22#ifndef ZEPHYR_INCLUDE_DRIVERS_MIPI_DBI_H_
23#define ZEPHYR_INCLUDE_DRIVERS_MIPI_DBI_H_
45#define MIPI_DBI_DT_SPI_DEV(node_id) \
46 DT_PHANDLE(DT_PARENT(node_id), spi_dev)
48#define MIPI_DBI_SPI_CS_GPIOS_DT_SPEC_GET(node_id) \
49 GPIO_DT_SPEC_GET_BY_IDX_OR(MIPI_DBI_DT_SPI_DEV(node_id), \
50 cs_gpios, DT_REG_ADDR_RAW(node_id), {})
52#define MIPI_DBI_SPI_CS_CONTROL_INIT_GPIO(node_id, delay_) \
53 .gpio = MIPI_DBI_SPI_CS_GPIOS_DT_SPEC_GET(node_id), \
68#define MIPI_DBI_SPI_CONFIG_DT(node_id, operation_, delay_) \
70 .frequency = DT_PROP(node_id, mipi_max_frequency), \
71 .operation = (operation_) | \
72 DT_PROP_OR(node_id, duplex, 0) | \
73 COND_CODE_1(DT_PROP(node_id, mipi_cpol), SPI_MODE_CPOL, (0)) | \
74 COND_CODE_1(DT_PROP(node_id, mipi_cpha), SPI_MODE_CPHA, (0)) | \
75 COND_CODE_1(DT_PROP(node_id, mipi_hold_cs), SPI_HOLD_ON_CS, (0)), \
76 .slave = DT_REG_ADDR(node_id), \
78 COND_CODE_1(DT_SPI_HAS_CS_GPIOS(MIPI_DBI_DT_SPI_DEV(node_id)), \
79 (MIPI_DBI_SPI_CS_CONTROL_INIT_GPIO(node_id, delay_)), \
80 (SPI_CS_CONTROL_INIT_NATIVE(node_id))) \
81 .cs_is_gpio = DT_SPI_HAS_CS_GPIOS(MIPI_DBI_DT_SPI_DEV(node_id)),\
95#define MIPI_DBI_SPI_CONFIG_DT_INST(inst, operation_, delay_) \
96 MIPI_DBI_SPI_CONFIG_DT(DT_DRV_INST(inst), operation_, delay_)
110#define MIPI_DBI_CONFIG_DT(node_id, operation_, delay_) \
112 .mode = DT_STRING_UPPER_TOKEN(node_id, mipi_mode), \
113 .config = MIPI_DBI_SPI_CONFIG_DT(node_id, operation_, delay_), \
125#define MIPI_DBI_CONFIG_DT_INST(inst, operation_, delay_) \
126 MIPI_DBI_CONFIG_DT(DT_DRV_INST(inst), operation_, delay_)
137#define MIPI_DBI_TE_MODE_DT(node_id, edge_prop) \
138 DT_STRING_UPPER_TOKEN(node_id, edge_prop)
149#define MIPI_DBI_TE_MODE_DT_INST(inst, edge_prop) \
150 DT_STRING_UPPER_TOKEN(DT_DRV_INST(inst), edge_prop)
169 const uint8_t *data,
size_t len);
172 size_t num_cmds,
uint8_t *response,
size_t len);
248 return api->
command_read(dev, config, cmds, num_cmd, response, len);
282 return api->
write_display(dev, config, framebuf, desc, pixfmt);
333 return api->
release(dev, config);
Main header file for display driver API.
Main header file for SPI (Serial Peripheral Interface) driver API.
#define K_MSEC(ms)
Generate timeout delay from milliseconds.
Definition kernel.h:1497
#define K_USEC(t)
Generate timeout delay from microseconds.
Definition kernel.h:1461
display_pixel_format
Display pixel formats.
Definition display.h:43
static void cmd(uint32_t command)
Execute a display list command by co-processor engine.
Definition ft8xx_reference_api.h:153
static int mipi_dbi_reset(const struct device *dev, uint32_t delay_ms)
Resets attached display controller.
Definition mipi_dbi.h:296
static int mipi_dbi_write_display(const struct device *dev, const struct mipi_dbi_config *config, const uint8_t *framebuf, struct display_buffer_descriptor *desc, enum display_pixel_format pixfmt)
Write a display buffer to the display controller.
Definition mipi_dbi.h:270
static int mipi_dbi_configure_te(const struct device *dev, uint8_t edge, uint32_t delay_us)
Configures MIPI DBI tearing effect signal.
Definition mipi_dbi.h:362
static int mipi_dbi_command_write(const struct device *dev, const struct mipi_dbi_config *config, uint8_t cmd, const uint8_t *data, size_t len)
Write a command to the display controller.
Definition mipi_dbi.h:206
static int mipi_dbi_release(const struct device *dev, const struct mipi_dbi_config *config)
Releases a locked MIPI DBI device.
Definition mipi_dbi.h:324
static int mipi_dbi_command_read(const struct device *dev, const struct mipi_dbi_config *config, uint8_t *cmds, size_t num_cmd, uint8_t *response, size_t len)
Read a command response from the display controller.
Definition mipi_dbi.h:237
#define ENOSYS
Function not implemented.
Definition errno.h:82
#define NULL
Definition iar_missing_defs.h:20
Display definitions for MIPI devices.
__UINT32_TYPE__ uint32_t
Definition stdint.h:90
__UINT8_TYPE__ uint8_t
Definition stdint.h:88
Runtime device structure (in ROM) per driver instance.
Definition device.h:510
void * data
Address of the device instance private data.
Definition device.h:520
const void * api
Address of the API structure exposed by the device instance.
Definition device.h:516
const void * config
Address of device instance config information.
Definition device.h:514
Structure to describe display data buffer layout.
Definition display.h:147
Kernel timeout type.
Definition clock.h:65
MIPI DBI controller configuration.
Definition mipi_dbi.h:157
uint8_t mode
MIPI DBI mode.
Definition mipi_dbi.h:159
struct spi_config config
SPI configuration.
Definition mipi_dbi.h:161
MIPI-DBI host driver API.
Definition mipi_dbi.h:166
int(* reset)(const struct device *dev, k_timeout_t delay)
Definition mipi_dbi.h:178
int(* release)(const struct device *dev, const struct mipi_dbi_config *config)
Definition mipi_dbi.h:179
int(* command_read)(const struct device *dev, const struct mipi_dbi_config *config, uint8_t *cmds, size_t num_cmds, uint8_t *response, size_t len)
Definition mipi_dbi.h:170
int(* command_write)(const struct device *dev, const struct mipi_dbi_config *config, uint8_t cmd, const uint8_t *data, size_t len)
Definition mipi_dbi.h:167
int(* write_display)(const struct device *dev, const struct mipi_dbi_config *config, const uint8_t *framebuf, struct display_buffer_descriptor *desc, enum display_pixel_format pixfmt)
Definition mipi_dbi.h:173
int(* configure_te)(const struct device *dev, uint8_t edge, k_timeout_t delay)
Definition mipi_dbi.h:181
SPI controller configuration structure.
Definition spi.h:438