renesas-rz-gpio.h File Reference

Go to the source code of this file.

Macros
#define	RZG3S_GPIO_IOLH_SHIFT   7U
	RZ G3S specific GPIO Flags The pin driving ability flags are encoded in the 8 upper bits of gpio_dt_flags_t as follows:
#define	RZG3S_GPIO_IOLH_SET(iolh_val)
#define	RZG3S_GPIO_FILTER_SHIFT   9U
#define	RZG3S_GPIO_FILNUM_SHIFT   1U
#define	RZG3S_GPIO_FILCLKSEL_SHIFT   3U
#define	RZG3S_GPIO_FILTER_SET(fillonoff, filnum, filclksel)

Macro Definition Documentation

RZG3S_GPIO_FILCLKSEL_SHIFT

#define RZG3S_GPIO_FILCLKSEL_SHIFT   3U

RZG3S_GPIO_FILNUM_SHIFT

#define RZG3S_GPIO_FILNUM_SHIFT   1U

RZG3S_GPIO_FILTER_SET

#define RZG3S_GPIO_FILTER_SET	(		fillonoff,
			filnum,
			filclksel )

Value:

        (((fillonoff) | ((filnum) << RZG3S_GPIO_FILNUM_SHIFT) |                                    \
          ((filclksel) << RZG3S_GPIO_FILCLKSEL_SHIFT))                                             \
         << RZG3S_GPIO_FILTER_SHIFT)

RZG3S_GPIO_FILTER_SHIFT

#define RZG3S_GPIO_FILTER_SHIFT   9U

RZG3S_GPIO_IOLH_SET

#define RZG3S_GPIO_IOLH_SET

(

iolh_val

)

Value:

(iolh_val << RZG3S_GPIO_IOLH_SHIFT)

RZG3S_GPIO_IOLH_SHIFT

#define RZG3S_GPIO_IOLH_SHIFT   7U

RZ G3S specific GPIO Flags The pin driving ability flags are encoded in the 8 upper bits of gpio_dt_flags_t as follows:

• Bit 9..8: Pin driving ability value
• Bit 11..10: Digital Noise Filter Clock Selection value
• Bit 13..12: Digital Noise Filter Number value
• Bit 14: Digital Noise Filter ON/OFF example: gpio-consumer { out-gpios = <&port8 2 (GPIO_PULL_UP | RZG3S_GPIO_FILTER_SET(1, 3, 3))>; }; gpio-consumer { out-gpios = <&port8 2 (GPIO_PULL_UP | RZG3S_GPIO_IOLH_SET(2))>; };