Memory Controller (MEMC)
Overview
The MEMC API provides a generic interface for accessing external memory devices such as PSRAM and NOR flash. It supports two access modes:
Memory-mapped: The controller exposes the device through a direct CPU-accessible address window. The driver may implement
memc_driver_api.get_mem_baseto advertise the mapped base address, allowingmemc_read()andmemc_write()to usememcpyautomatically. Alternatively, the driver may provide no runtime API at all if the hardware maps memory transparently - in this case upper layers access the device directly using a platform-specific base address.Bus transaction: The controller issues explicit bus commands (e.g., MSPI) for each transfer. The driver implements
memc_driver_api.readandmemc_driver_api.write. Used when no memory-mapped aperture exists on the controller.
memc_read() and memc_write() automatically select the
memory-mapped path when available, falling back to bus transactions otherwise.
Additional optional APIs are provided for device introspection:
memc_get_size() returns the device capacity and
memc_read_id() returns device identification bytes.
Legacy (Init-Only) Drivers
Existing memc drivers that pass NULL as the API pointer to
DEVICE_DT_INST_DEFINE are not affected by this API. Callers should
use DEVICE_API_IS to test whether a device implements the
memc interface before calling any memc function:
if (DEVICE_API_IS(memc, dev)) {
memc_read(dev, offset, buf, sizeof(buf));
} else {
/* Legacy init-only driver - device is memory-mapped.
* Access via platform-specific base address.
*/
memcpy(buf, (const uint8_t *)MEMC_BASE + offset, sizeof(buf));
}
Calling memc_read() or memc_write() on a device that
does not implement the memc API returns -ENOTSUP.
Configuration Options
Related configuration options: