Versal NET RPU development board

Overview

This configuration provides support for the RPU(R52), real-time processing unit on Xilinx Versal Net SOC, it can operate as following:

Two independent R52 cores with their own TCMs (tightly coupled memories)
Or as a single dual lock step unit with the TCM.

This processing unit is based on an ARM Cortex-R52 CPU, it also enables the following devices:

ARM GIC v3 Interrupt Controller
Global Timer Counter
SBSA UART

Hardware

Supported Features

The versalnet_rpu board supports the hardware features listed below.

on-chip / on-board: Feature integrated in the SoC / present on the board.
2 / 2: Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.
vnd,foo: Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

versalnet_rpu

/

amd_versalnet_rpu

Type	Location	Description	Compatible
CPU	on-chip	ARM Cortex-R52 CPU1	`arm,cortex-r52`
Interrupt controller	on-chip	ARM Generic Interrupt Controller v31	`arm,gic-v3`
Serial controller	on-chip	ARM SBSA UART2	`arm,sbsa-uart`
SRAM	on-board	Generic on-chip SRAM description1	`mmio-sram`
Timer	on-chip	per-core ARM architected timer1	`arm,armv8-timer`

Devices

System Timer

This board configuration uses a system timer tick frequency of 100 MHz.

Serial Port

This board configuration uses a single serial communication channel with the on-chip UART0.

Memories

Although Flash, DDR and OCM memory regions are defined in the DTS file, all the code plus data of the application will be loaded in the sram0 region, which points to the DDR memory. The ocm0 memory area is currently available for usage, although nothing is placed there by default.

Known Problems or Limitations

The following platform features are unsupported:

Only the first core of the R52 subsystem is supported.

Programming and Debugging

Build and flash in the usual way. Here is an example for the Hello World application.

# From the root of the zephyr repository
west build -b versalnet_rpu samples/hello_world
west flash

You should see the following message on the console:

Hello World!

References

ARMv8-R Architecture Reference Manual (ARM DDI 0568A.c ID110520)
Cortex-R52 and Cortex-R52F Technical Reference Manual (ARM DDI r1p4 100026_0104_01_en)