FRDM-MCXN236

Board Overview

FRDM-MCXN236

Name:

frdm_mcxn236

Vendor:

NXP Semiconductors

Architecture:

arm

SoC:

mcxn236

Browse board sources

Overview

FRDM-MCXN236 are compact and scalable development boards for rapid prototyping of MCX N23X MCUs. They offer industry standard headers for easy access to the MCUs I/Os, integrated open-standard serial interfaces, external flash memory and an on-board MCU-Link debugger. MCX N Series are high-performance, low-power microcontrollers with intelligent peripherals and accelerators providing multi-tasking capabilities and performance efficiency.

Hardware

• MCX-N236 Arm Cortex-M33 microcontroller running at 150 MHz

• 1MB dual-bank on chip Flash

• 352 KB RAM

• USB high-speed (Host/Device) with on-chip HS PHY. HS USB Type-C connectors

• 8x LP Flexcomms each supporting SPI, I2C, UART

• 2x FlexCAN with FD, 2x I3Cs, 2x SAI

• On-board MCU-Link debugger with CMSIS-DAP

• Arduino Header, FlexIO/LCD Header, SmartDMA/Camera Header, mikroBUS

For more information about the MCX-N236 SoC and FRDM-MCXN236 board, see:

• MCX-N236 SoC Website

• MCX-N236 Datasheet

• MCX-N236 Reference Manual

• FRDM-MCXN236 Website

• FRDM-MCXN236 User Guide

• FRDM-MCXN236 Board User Manual

• FRDM-MCXN236 Schematics

Supported Features

The frdm_mcxn236 board supports the hardware features listed below.

on-chip / on-board

Feature integrated in the SoC / present on the board.

2 / 2

Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.

vnd,foo

Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

frdm_mcxn236

/

mcxn236

frdm_mcxn236/mcxn236 target

Type	Location	Description	Compatible
CPU	on-chip	ARM Cortex-M33F CPU1	arm,cortex-m33f
ADC	on-chip	LPC LPADC1 1	nxp,lpc-lpadc
CAN	on-chip	NXP FlexCAN controller1 1	nxp,flexcan
Clock control	on-chip	LPC SYSCON & CLKCTL IP node1	nxp,lpc-syscon
Counter	on-chip	NXP MCUX Standard Timer/Counter1 4	nxp,lpc-ctimer
	on-chip	NXP LPTMR2	nxp,lptmr
	on-chip	NXP Multirate Timer1	nxp,mrt
	on-chip	NXP Multirate Timer Channel1 3	nxp,mrt-channel
DMA	on-chip	NXP MCUX EDMA controller1 1	nxp,mcux-edma
Flash controller	on-chip	NXP MSF1 Flash Memory Module (FMU)1	nxp,msf1
GPIO & Headers	on-chip	Kinetis GPIO3 3	nxp,kinetis-gpio
	on-board	GPIO pins exposed on NXP LCD 8080 interface (e.g., used on LCD-PAR-035 panel)1	nxp,lcd-8080
I2C	on-chip	NXP LPI2C controller2 6	nxp,lpi2c
I3C	on-chip	NXP MCUX I3C controller1 1	nxp,mcux-i3c
Input	on-board	Group of GPIO-bound input keys1	gpio-keys
Interrupt controller	on-chip	ARMv8-M NVIC (Nested Vectored Interrupt Controller)1	arm,v8m-nvic
LED	on-board	Group of GPIO-controlled LEDs1	gpio-leds
Multi-Function Device	on-chip	Low Power Flexcomm4 4	nxp,lp-flexcomm
MIPI-DBI	on-chip	NXP FlexIO LCD controller1	nxp,mipi-dbi-flexio-lcdif
Miscellaneous	on-chip	NXP FlexIO controller1	nxp,flexio
MMU / MPU	on-chip	ARMv8-M MPU (Memory Protection Unit)1	arm,armv8m-mpu
MTD	on-chip	Flash node1	soc-nv-flash
	on-board	Fixed partitions of a flash (or other non-volatile storage) memory1	fixed-partitions
Pin control	on-chip	NXP PORT Pin Controller6	nxp,port-pinmux
	on-chip	NXP PORT Pin Controller1	nxp,port-pinctrl
PWM	on-chip	NXP eFLEX PWM module with mcux-pwm submodules2	nxp,flexpwm
	on-chip	NXP MCUX PWM1 7	nxp,imx-pwm
Regulator	on-chip	NXP VREF SOC peripheral1	nxp,vref
Reset controller	on-chip	LPC SYSCON Peripheral reset controller1	nxp,lpc-syscon-reset
RTC	on-chip	IRTC1	nxp,irtc
Sensors	on-chip	NXP low-power analog comparator (LPCMP)1 1	nxp,lpcmp
Serial controller	on-chip	NXP LPUART2 6	nxp,lpuart
SPI	on-chip	NXP LPSPI controller1 7	nxp,lpspi
SRAM	on-chip	Generic on-chip SRAM description1	mmio-sram
Timer	on-chip	ARMv8-M System Tick1	arm,armv8m-systick
	on-chip	NXP OS Timer on i.MX-RT5xx/6xx1	nxp,os-timer
USB	on-chip	NXP EHCI USB device mode1	nxp,ehci
Watchdog	on-chip	LPC Windowed Watchdog Timer1	nxp,lpc-wwdt

Connections and IOs

The MCX-N236 SoC has 6 gpio controllers and has pinmux registers which can be used to configure the functionality of a pin.

Name	Function	Usage
P0_PIO1_8	UART	UART RX
P1_PIO1_9	UART	UART TX

System Clock

The MCX-N236 SoC is configured to use PLL0 running at 150MHz as a source for the system clock.

Serial Port

The FRDM-MCXN236 SoC has 8 FLEXCOMM interfaces for serial communication. Flexcomm 4 is configured as UART for the console.

Programming and Debugging

Build and flash applications as usual (see Building an Application and Run an Application for more details).

Configuring a Debug Probe

A debug probe is used for both flashing and debugging the board. This board is configured by default to use the MCU-Link CMSIS-DAP Onboard Debug Probe.

Using LinkServer

Linkserver is the default runner for this board, and supports the factory default MCU-Link firmware. Follow the instructions in MCU-Link CMSIS-DAP Onboard Debug Probe to reprogram the default MCU-Link firmware. This only needs to be done if the default onboard debug circuit firmware was changed. To put the board in DFU mode to program the firmware, short jumper JP5.

Using J-Link

There are two options. The onboard debug circuit can be updated with Segger J-Link firmware by following the instructions in MCU-Link JLink Onboard Debug Probe. To be able to program the firmware, you need to put the board in DFU mode by shortening the jumper JP5. The second option is to attach a J-Link External Debug Probe to the 10-pin SWD connector (J12) of the board. Additionally, the jumper JP7 must be shortened. For both options use the -r jlink option with west to use the jlink runner.

west flash -r jlink

Configuring a Console

Connect a USB cable from your PC to J10, and use the serial terminal of your choice (minicom, putty, etc.) with the following settings:

• Speed: 115200

• Data: 8 bits

• Parity: None

• Stop bits: 1

Flashing

Here is an example for the Hello World application.

# From the root of the zephyr repository
west build -b frdm_mcxn236 samples/hello_world
west flash

Open a serial terminal, reset the board (press the RESET button), and you should see the following message in the terminal:

*** Booting Zephyr OS build v3.6.0-4478-ge6c3a42f5f52 ***
Hello World! frdm_mcxn236/mcxn236

Debugging

Here is an example for the Hello World application.

# From the root of the zephyr repository
west build -b frdm_mcxn236/mcxn236 samples/hello_world
west debug

Open a serial terminal, step through the application in your debugger, and you should see the following message in the terminal:

*** Booting Zephyr OS build v3.6.0-4478-ge6c3a42f5f52 ***
Hello World! frdm_mcxn236/mcxn236

Troubleshooting

Using Segger SystemView and RTT

Note that when using SEGGER SystemView or RTT with this SOC, the RTT control block address must be set manually within SystemView or the RTT Viewer. The address provided to the tool should be the location of the _SEGGER_RTT symbol, which can be found using a debugger or by examining the zephyr.map file output by the linker.

The RTT control block address must be provided manually because this SOC supports ECC RAM. If the SEGGER tooling searches the ECC RAM space for the control block a fault will occur, provided that ECC is enabled and the RAM segment being searched has not been initialized to a known value.

Support Resources for Zephyr

• NXP Zephyr Downstream Software Development Kit

• MCUXpresso for VS Code, wiki documentation and Zephyr lab guides

• NXP Zephyr Knowledge Hub

• NXP’s Zephyr landing page (including training resources)

• NXP Support Community forum for Zephyr