MIMXRT1020-EVK

Board Overview

MIMXRT1020-EVK

Name:

mimxrt1020_evk

Vendor:

NXP Semiconductors

Architecture:

arm

SoC:

mimxrt1021

Browse board sources

Overview

The i.MX RT1020 expands the i.MX RT crossover processor families by providing high-performance feature set in low-cost LQFP packages, further simplifying board design and layout for customers. The i.MX RT1020 runs on the Arm® Cortex®-M7 core at 500 MHz.

Hardware

• MIMXRT1021DAG5A MCU

• Memory

  • 256 Mbit SDRAM

  • 64 Mbit QSPI Flash

  • TF socket for SD card

• Connectivity

  • 10/100 Mbit/s Ethernet PHY

  • Micro USB host and OTG connectors

  • CAN transceivers

  • Arduino interface

• Audio

  • Audio Codec

  • 4-pole audio headphone jack

  • Microphone

  • External speaker connection

• Power

  • 5 V DC jack

• Debug

  • JTAG 20-pin connector

  • OpenSDA with DAPLink

For more information about the MIMXRT1020 SoC and MIMXRT1020-EVK board, see these references:

• i.MX RT1020 Website

• i.MX RT1020 Datasheet

• i.MX RT1020 Reference Manual

• MIMXRT1020-EVK Website

• MIMXRT1020-EVK User Guide

• MIMXRT1020-EVK Design Files

External Memory

This platform has the following external memories:

Device	Controller	Status
MT48LC16M16A2P	SEMC	Enabled via device configuration data block, which sets up SEMC at boot time
IS25LP064A	FLEXSPI	Enabled via flash configuration block, which sets up FLEXSPI at boot time

Supported Features

The mimxrt1020_evk board supports the hardware features listed below.

on-chip / on-board

Feature integrated in the SoC / present on the board.

2 / 2

Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.

vnd,foo

Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

mimxrt1020_evk

/

mimxrt1021

mimxrt1020_evk/mimxrt1021 target

Type	Location	Description	Compatible
CPU	on-chip	ARM Cortex-M7 CPU1	arm,cortex-m7
ADC	on-chip	NXP MCUA 12B1MSPS SAR ADC1 1	nxp,mcux-12b1msps-sar
ARM architecture	on-chip	MCUX XBAR (Crossbar)3	nxp,mcux-xbar
CAN	on-chip	NXP FlexCAN controller2	nxp,flexcan
	on-chip	NXP FlexCAN CANFD controller1	nxp,flexcan-fd
Clock control	on-chip	i.MX CCM (Clock Controller Module) IP node1	nxp,imx-ccm
	on-chip	Generic fixed factor clock provider3	fixed-factor-clock
	on-chip	i.MX CCM Fractional PLL1	nxp,imx-ccm-fnpll
	on-chip	i.MX ANATOP (Analog Clock Controller Module) IP node1	nxp,imx-anatop
	on-chip	Generic fixed-rate clock provider4	fixed-clock
Counter	on-chip	NXP MCUX Quad Timer (QTMR)4	nxp,imx-qtmr
	on-chip	NXP MCUX Quad Timer Channel16	nxp,imx-tmr
	on-chip	NXP Periodic Interrupt Timer (PIT)1	nxp,pit
	on-chip	Child node for the Periodic Interrupt Timer node, intended for an individual timer channel4	nxp,pit-channel
Cryptographic accelerator	on-chip	NXP Data Co-Processor (DCP) Crypto accelerator1	nxp,mcux-dcp
Debug	on-chip	ARMv7 instrumentation trace macrocell1	arm,armv7m-itm
Display	on-chip	NXP i.MX eLCDIF (Enhanced LCD Interface) controller1	nxp,imx-elcdif
DMA	on-chip	NXP MCUX EDMA controller1	nxp,mcux-edma
	on-chip	NXP PXP 2D DMA engine1	nxp,pxp
Ethernet	on-chip	NXP ENET IP Module1	nxp,enet
	on-chip	NXP ENET MAC/L2 Device1	nxp,enet-mac
	on-board	Microchip KSZ8081 Ethernet PHY device1	microchip,ksz8081
	on-chip	NXP ENET PTP (Precision Time Protocol) Clock1	nxp,enet-ptp-clock
GPIO & Headers	on-chip	i.MX GPIO4	nxp,imx-gpio
	on-board	GPIO pins exposed on Arduino Uno (R3) headers1	arduino-header-r3
I2C	on-chip	NXP LPI2C controller2 2	nxp,lpi2c
I2S	on-chip	NXP mcux SAI-I2S controller3	nxp,mcux-i2s
Input	on-board	Group of GPIO-bound input keys1	gpio-keys
Interrupt controller	on-chip	ARMv7-M NVIC (Nested Vectored Interrupt Controller)1	arm,v7m-nvic
LED	on-board	Group of GPIO-controlled LEDs1	gpio-leds
MDIO	on-chip	NXP ENET MDIO Features1	nxp,enet-mdio
Memory controller	on-chip	NXP FlexRAM on-chip ram controller If the flexram,bank-spec property is specified, then the flexram will be dynamically reconfigured to the configuration specified at runtime1	nxp,flexram
	on-chip	NXP Smart External Memory Controller (SEMC)1	nxp,imx-semc
Miscellaneous	on-chip	NXP FlexIO controller1	nxp,flexio
MMU / MPU	on-chip	ARMv7-M Memory Protection Unit (MPU)1	arm,armv7m-mpu
MTD	on-board	NXP FlexSPI NOR1	nxp,imx-flexspi-nor
	on-board	Fixed partitions of a flash (or other non-volatile storage) memory1	fixed-partitions
Pin control	on-chip	This compatible binding should be applied to the device’s iomuxc DTS node1	nxp,imx-iomuxc
	on-chip	The node has the ‘pinctrl’ node label set in MCUX RT SoC’s devicetree1	nxp,mcux-rt-pinctrl
	on-chip	i.MX IOMUXC1	nxp,imx-gpr
PWM	on-chip	NXP eFLEX PWM module with mcux-pwm submodules4	nxp,flexpwm
	on-chip	NXP MCUX PWM16	nxp,imx-pwm
RNG	on-chip	Kinetis TRNG (True Random Number Generator)1	nxp,kinetis-trng
RTC	on-chip	NXP SNVS LP/HP RTC1	nxp,imx-snvs-rtc
SDHC	on-chip	NXP imx USDHC controller1 1	nxp,imx-usdhc
Sensors	on-chip	NXP MCUX QDEC4	nxp,mcux-qdec
	on-chip	NXP on-die temperature monitor1	nxp,tempmon
Serial controller	on-chip	NXP LPUART1 7	nxp,lpuart
SPI	on-chip	NXP FlexSPI controller1	nxp,imx-flexspi
	on-chip	NXP LPSPI controller1 3	nxp,lpspi
Timer	on-chip	ARMv7-M System Tick1	arm,armv7m-systick
	on-chip	NXP MCUX General-Purpose HW Timer (GPT)1	nxp,gpt-hw-timer
	on-chip	NXP MCUX General-Purpose Timer (GPT)1	nxp,imx-gpt
USB	on-chip	NXP EHCI USB device mode1 1	nxp,ehci
	on-chip	NXP USB high speed phy that is used on NXP RTxxxx, RTxxx, MCX, LPC and Kinetis platforms if high speed usb is supported on these platforms2	nxp,usbphy
Video	on-chip	NXP MCUX CMOS sensor interface1	nxp,imx-csi
Watchdog	on-chip	imxRT watchdog2	nxp,imx-wdog

Note

For additional features not yet supported, please also refer to the MIMXRT1064-EVK , which is the superset board in NXP’s i.MX RT10xx family. NXP prioritizes enabling the superset board with NXP’s Full Platform Support for Zephyr. Therefore, the mimxrt1064_evk board may have additional features already supported, which can also be re-used on this mimxrt1020_evk board.

Connections and I/Os

The MIMXRT1020 SoC has five pairs of pinmux/gpio controllers.

Name	Function	Usage
GPIO_AD_B0_05	GPIO	LED
GPIO_AD_B0_06	LPUART1_TX	UART Console
GPIO_AD_B0_07	LPUART1_RX	UART Console
GPIO_AD_B1_08	LPUART2_TX	UART BT HCI
GPIO_AD_B1_09	LPUART2_RX	UART BT HCI
GPIO_AD_B1_14	LPI2C1_SCL	I2C
GPIO_AD_B1_15	LPI2C1_SDA	I2C
GPIO_SD_B1_02	LPI2C4_SCL	I2C
GPIO_SD_B1_03	LPI2C4_SDA	I2C
WAKEUP	GPIO	SW0
GPIO_AD_B0_04	ENET_RST	Ethernet
GPIO_AD_B0_08	ENET_REF_CLK	Ethernet
GPIO_AD_B0_09	ENET_RX_DATA01	Ethernet
GPIO_AD_B0_10	ENET_RX_DATA00/LPSPI1_SCK | Ethernet/SPI
GPIO_AD_B0_11	ENET_RX_EN/LPSPI1_PCS0 | Ethernet/SPI
GPIO_AD_B0_12	ENET_RX_ER/LPSPI1_SDO | Ethernet/SPI
GPIO_AD_B0_13	ENET_TX_EN/LPSPI1_SDI | Ethernet/SPI
GPIO_AD_B0_14	ENET_TX_DATA00	Ethernet
GPIO_AD_B0_15	ENET_TX_DATA01	Ethernet
GPIO_AD_B1_06	ENET_INT	Ethernet
GPIO_EMC_41	ENET_MDC	Ethernet
GPIO_EMC_40	ENET_MDIO	Ethernet
GPIO_AD_B1_07	USDHC1_VSELECT	SD Card
GPIO_SD_B0_02	USDHC1_CMD	SD Card
GPIO_SD_B0_03	USDHC1_CLK	SD Card
GPIO_SD_B0_04	USDHC1_DATA0	SD Card
GPIO_SD_B0_05	USDHC1_DATA1	SD Card
GPIO_SD_B0_00	USDHC1_DATA2	SD Card
GPIO_SD_B0_01	USDHC1_DATA3	SD Card
GPIO_SD_B0_06	USDHC1_CD_B	SD Card
GPIO_AD_B1_10	ADC	ADC1 Channel 10
GPIO_AD_B1_11	ADC	ADC1 Channel 11

System Clock

The MIMXRT1020 SoC is configured to use SysTick as the system clock source, running at 500MHz.

When power management is enabled, the 32 KHz low frequency oscillator on the board will be used as a source for the GPT timer to generate a system clock. This clock enables lower power states, at the cost of reduced resolution

Serial Port

The MIMXRT1020 SoC has eight UARTs. LPUART1 is configured for the console, LPUART2 for the Bluetooth Host Controller Interface (BT HCI), and the remaining are not used.

Programming and Debugging

This board supports 3 debug host tools. Please install your preferred host tool, then follow the instructions in Configuring a Debug Probe to configure the board appropriately.

• LinkServer Debug Host Tools (Default, Supported by NXP)

• J-Link Debug Host Tools (Supported by NXP)

• pyOCD Debug Host Tools (Not supported by NXP)

Once the host tool and board are configured, build and flash applications as usual (see Building an Application and Run an Application for more details).

Configuring a Debug Probe

For the RT1020, J47/J48 are the SWD isolation jumpers, J42 is the DFU mode jumper, and J16 is the 20 pin JTAG/SWD header.

A debug probe is used for both flashing and debugging the board. This board has an LPC-LINK2 Onboard Debug Probe. The default firmware present on this probe is the LPC-Link2 DAPLink Onboard Debug Probe.

Based on the host tool installed, please use the following instructions to setup your debug probe:

• J-Link Debug Host Tools: Using J-Link with LPC-Link2 Probe

• LinkServer Debug Host Tools: Using CMSIS-DAP with LPC-Link2 Probe

• pyOCD Debug Host Tools: Using CMSIS-DAP with LPC-Link2 Probe

Using CMSIS-DAP with LPC-Link2 Probe

1. Follow the instructions provided at LPC-LINK2 CMSIS DAP Onboard Debug Probe to reprogram the default debug probe firmware on this board.

2. Ensure the SWD isolation jumpers are populated

Using J-Link with LPC-Link2 Probe

There are two options: the onboard debug circuit can be updated with Segger J-Link firmware, or a J-Link External Debug Probe can be attached to the EVK.

To update the onboard debug circuit, please do the following:

1. Switch the power source for the EVK to a different source than the debug USB, as the J-Link firmware does not power the EVK via the debug USB.

2. Follow the instructions provided at LPC-Link2 J-Link Onboard Debug Probe to reprogram the default debug probe firmware on this board.

3. Ensure the SWD isolation jumpers are populated.

To attach an external J-Link probe, ensure the SWD isolation jumpers are removed, then connect the probe to the external JTAG/SWD header

Configuring a Console

Regardless of your choice in debug probe, we will use the OpenSDA microcontroller as a usb-to-serial adapter for the serial console. Check that jumpers J25 and J26 are on (they are on by default when boards ship from the factory) to connect UART signals to the OpenSDA microcontroller.

Connect a USB cable from your PC to J23.

Use the following settings with your serial terminal of choice (minicom, putty, etc.):

• Speed: 115200

• Data: 8 bits

• Parity: None

• Stop bits: 1

Flashing

Here is an example for the Hello World application.

# From the root of the zephyr repository
west build -b mimxrt1020_evk samples/hello_world
west flash

Open a serial terminal, reset the board (press the SW5 button), and you should see the following message in the terminal:

***** Booting Zephyr OS v1.14.0-rc1 *****
Hello World! mimxrt1020_evk

Debugging

Here is an example for the Hello World application.

# From the root of the zephyr repository
west build -b mimxrt1020_evk samples/hello_world
west debug

Open a serial terminal, step through the application in your debugger, and you should see the following message in the terminal:

***** Booting Zephyr OS v1.14.0-rc1 *****
Hello World! mimxrt1020_evk

Support Resources for Zephyr

• NXP Zephyr Downstream Software Development Kit

• MCUXpresso for VS Code, wiki documentation and Zephyr lab guides

• NXP Zephyr Knowledge Hub

• NXP’s Zephyr landing page (including training resources)

• NXP Support Community forum for Zephyr