MIMXRT685-EVK

Overview

The i.MX RT600 is a crossover MCU family optimized for 32-bit immersive audio playback and voice user interface applications combining a high-performance Cadence Tensilica HiFi 4 audio DSP core with a next-generation Cortex-M33 core. The i.MX RT600 family of crossover MCUs is designed to unlock the potential of voice-assisted end nodes with a secure, power-optimized embedded processor.

The i.MX RT600 family provides up to 4.5MB of on-chip SRAM and several high-bandwidth interfaces to access off-chip flash, including an Octal/Quad SPI interface with an on-the-fly decryption engine.

Hardware

  • MIMXRT685SFVKB Cortex-M33 (300 MHz, 128 KB TCM) core processor with Cadence Xtensa HiFi4 DSP

  • Onboard, high-speed USB, Link2 debug probe with CMSIS-DAP protocol (supporting Cortex M33 debug only)

  • High speed USB port with micro A/B connector for the host or device functionality

  • UART, I2C and SPI port bridging from i.MX RT685 target to USB via the on-board debug probe

  • 512 MB Macronix Octal SPI Flash operating at 1.8 V

  • 4.5 MB Apmemory PSRAM

  • Full size SD card slot (SDIO)

  • NXP PCA9420UK PMIC

  • User LEDs

  • Reset and User buttons

  • Arduino and PMod/Host expansion connectors

  • NXP FXOS8700CQ accelerometer

  • Stereo audio codec with line in/out and electret microphone

  • Stereo NXP TFA9894 digital amplifiers, with option for external +5V power for higher performance speakers

  • Support for up to eight off-board digital microphones via 12-pin header

  • Two on-board DMICS

For more information about the MIMXRT685 SoC and MIMXRT685-EVK board, see these references:

Supported Features

NXP considers the MIMXRT685-EVK as a superset board for the i.MX RT6xx family of MCUs. This board is a focus for NXP’s Full Platform Support for Zephyr, to better enable the entire RT6xx family. NXP prioritizes enabling this board with new support for Zephyr features. Another very similar board is the MIMXRT595-EVK, and that board may have additional features already supported, which can also be re-used on this mimxrt685_evk board.

The mimxrt685_evk board supports the hardware features listed below.

on-chip / on-board
Feature integrated in the SoC / present on the board.
2 / 2
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.
vnd,foo
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.
mimxrt685_evk
/
mimxrt685s/cm33

Type

Location

Description

Compatible

CPU

on-chip

ARM Cortex-M33F CPU1

arm,cortex-m33f

ADC

on-chip

LPC LPADC1

nxp,lpc-lpadc

ARM architecture

on-chip

LPC Flexcomm node2

nxp,lpc-flexcomm

Audio

on-chip

NXP DMIC1

nxp,dmic

on-board

WM8904 audio codec1

wolfson,wm8904

Clock control

on-chip

LPC SYSCON & CLKCTL IP node2

nxp,lpc-syscon

Counter

on-chip

Driver that uses the NXP LPC RTC High resolution counter1

nxp,lpc-rtc-highres

on-chip

NXP MCUX Standard Timer/Counter5

nxp,lpc-ctimer

on-chip

NXP Multirate Timer1

nxp,mrt

on-chip

NXP Multirate Timer Channel4

nxp,mrt-channel

DMA

on-chip

NXP LPC DMA controller1 1

nxp,lpc-dma

GPIO & Headers

on-chip

LPC GPIO1

nxp,lpc-gpio

on-chip

LPC GPIO port device6

nxp,lpc-gpio-port

on-board

GPIO pins exposed on Arduino Uno (R3) headers1

arduino-header-r3

Hardware information

on-chip

NXP LPC 128-bit Unique identifier1

nxp,lpc-uid

I2C

on-chip

LPC I2C2

nxp,lpc-i2c

I2S

on-chip

LPC I2S node2

nxp,lpc-i2s

I3C

on-chip

NXP MCUX I3C controller1

nxp,mcux-i3c

Input

on-board

Group of GPIO-bound input keys1

gpio-keys

Interrupt controller

on-chip

NXP Pin interrupt and pattern match engine (PINT)1

nxp,pint

on-chip

ARMv8-M NVIC (Nested Vectored Interrupt Controller)1

arm,v8m-nvic

LED

on-board

Group of GPIO-controlled LEDs1

gpio-leds

on-board

Group of PWM-controlled LEDs1

pwm-leds

MMU / MPU

on-chip

ARMv8-M MPU (Memory Protection Unit)1

arm,armv8m-mpu

MTD

on-board

NXP FlexSPI MX25UM51345G1

nxp,imx-flexspi-mx25um51345g

on-board

Fixed partitions of a flash (or other non-volatile storage) memory1

fixed-partitions

Pin control

on-chip

LPC I/O Pin Configuration (IOCON)1

nxp,lpc-iocon

on-chip

RT600/RT500 Pin Controller1

nxp,rt-iocon-pinctrl

PWM

on-chip

NXP SCTimer PWM1

nxp,sctimer-pwm

Regulator

on-board

NXP PCA9420 PMIC1

nxp,pca9420

Reset controller

on-chip

NXP RSTCTL Peripheral reset controller2

nxp,rstctl

RNG

on-chip

Kinetis TRNG (True Random Number Generator)1

nxp,kinetis-trng

RTC

on-chip

NXP LPC RTC1

nxp,lpc-rtc

SDHC

on-chip

NXP imx USDHC controller1 1

nxp,imx-usdhc

Sensors

on-board

FXOS8700 6-axis accelerometer/magnetometer sensor1

nxp,fxos8700

Serial controller

on-chip

LPC USART2

nxp,lpc-usart

SPI

on-chip

NXP FlexSPI controller1

nxp,imx-flexspi

on-chip

NXP LPC SPI controller1 1

nxp,lpc-spi

SRAM

on-chip

Generic on-chip SRAM description2

mmio-sram

Timer

on-chip

NXP OS Timer on i.MX-RT5xx/6xx1

nxp,os-timer

on-chip

ARMv8-M System Tick1

arm,armv8m-systick

USB

on-chip

NXP LPCIP3511 USB device mode1

nxp,lpcip3511

on-chip

NXP USB high speed phy that is used on NXP RTxxxx, RTxxx, MCX, LPC and Kinetis platforms if high speed usb is supported on these platforms1

nxp,usbphy

Watchdog

on-chip

LPC Windowed Watchdog Timer1 1

nxp,lpc-wwdt

Connections and IOs

The MIMXRT685 SoC has IOCON registers, which can be used to configure the functionality of a pin.

Name

Function

Usage

PIO0_2

USART

USART RX

PIO0_1

USART

USART TX

PIO0_14

GPIO

GREEN LED

PIO1_1

GPIO

SW0

PIO0_17

I2C

I2C SDA

PIO0_18

I2C

I2C SCL

PIO1_5

GPIO

FXOS8700 TRIGGER

PIO1_5

SPI

SPI MOSI

PIO1_4

SPI

SPI MISO

PIO1_3

SPI

SPI SCK

PIO1_6

SPI

SPI SSEL

PIO0_23

I2S

I2S DATAOUT

PIO0_22

I2S

I2S TX WS

PIO0_21

I2S

I2S TX SCK

PIO0_9

I2S

I2S DATAIN

PIO0_29

USART

USART TX

PIO0_30

USART

USART RX

PIO1_11

FLEXSPI0B_DATA0

OctalSPI Flash

PIO1_12

FLEXSPI0B_DATA1

OctalSPI Flash

PIO1_13

FLEXSPI0B_DATA2

OctalSPI Flash

PIO1_14

FLEXSPI0B_DATA3

OctalSPI Flash

PIO1_29

FLEXSPI0B_SCLK

OctalSPI Flash

PIO2_12

PIO2_12

OctalSPI Flash

PIO2_17

FLEXSPI0B_DATA4

OctalSPI Flash

PIO2_18

FLEXSPI0B_DATA5

OctalSPI Flash

PIO2_19

FLEXSPI0B_SS0_N

OctalSPI Flash

PIO2_22

FLEXSPI0B_DATA6

OctalSPI Flash

PIO2_23

FLEXSPI0B_DATA7

OctalSPI Flash

PIO0_27

SCT0_OUT7

PWM

PIO1_30

SD0_CLK

SD card

PIO1_31

SD0_CMD

SD card

PIO2_0

SD0_D0

SD card

PIO2_1

SD0_D1

SD card

PIO2_2

SD0_D2

SD card

PIO2_3

SD0_D3

SD card

PIO2_4

SD0_WR_PRT

SD card

PIO2_9

SD0_CD

SD card

PIO2_10

SD0_RST

SD card

System Clock

The MIMXRT685 EVK is configured to use the OS Event timer as a source for the system clock.

Serial Port

The MIMXRT685 SoC has 8 FLEXCOMM interfaces for serial communication. One is configured as USART for the console and the remaining are not used.

Programming and Debugging

Build and flash applications as usual (see Building an Application and Run an Application for more details).

Configuring a Debug Probe

A debug probe is used for both flashing and debugging the board. This board is configured by default to use the LPC-Link2.

  1. Install the LinkServer Debug Host Tools and make sure they are in your search path. LinkServer works with the default CMSIS-DAP firmware included in the on-board debugger.

  2. Make sure the jumpers JP17, JP18 and JP19 are installed.

linkserver is the default runner for this board

west flash
west debug

Configuring a Console

Connect a USB cable from your PC to J16, and use the serial terminal of your choice (minicom, putty, etc.) with the following settings:

  • Speed: 115200

  • Data: 8 bits

  • Parity: None

  • Stop bits: 1

Flashing

Here is an example for the Hello World application. This example uses the LinkServer Debug Host Tools as default.

# From the root of the zephyr repository
west build -b mimxrt685_evk/mimxrt685s/cm33 samples/hello_world
west flash

Open a serial terminal, reset the board (press the RESET button), and you should see the following message in the terminal:

***** Booting Zephyr OS v1.14.0 *****
Hello World! mimxrt685_evk

Debugging

Here is an example for the Hello World application. This example uses the LinkServer Debug Host Tools as default.

# From the root of the zephyr repository
west build -b mimxrt685_evk/mimxrt685s/cm33 samples/hello_world
west debug

Open a serial terminal, step through the application in your debugger, and you should see the following message in the terminal:

***** Booting Zephyr OS zephyr-v2.3.0 *****
Hello World! mimxrt685_evk

Troubleshooting

If the debug probe fails to connect with the following error, it’s possible that the image in flash is interfering and causing this issue.

Remote debugging using :2331
Remote communication error.  Target disconnected.: Connection reset by peer.
"monitor" command not supported by this target.
"monitor" command not supported by this target.
You can't do that when your target is `exec'
(gdb) Could not connect to target.
Please check power, connection and settings.

You can fix it by erasing and reprogramming the flash with the following steps:

  1. Set the SW5 DIP switches to ON-ON-ON to prevent booting from flash.

  2. Reset by pressing SW3

  3. Run west debug or west flash again with a known working Zephyr application (example “Hello World”).

  4. Set the SW5 DIP switches to ON-OFF-ON to boot from flash.

  5. Reset by pressing SW3

Support Resources for Zephyr