FMURT6

Board Overview

FMURT6

Name:

mimxrt1062_fmurt6

Vendor:

NXP Semiconductors

Architecture:

arm

SoC:

mimxrt1062

Browse board sources

Overview

The MIMXRT1062_FMURT6 adds to the industry’s crossover processor series and expands the i.MX RT series to three scalable families.

The i.MX RT1062 doubles the On-Chip SRAM to 1MB while keeping pin-to-pin compatibility with i.MX RT1050. This series introduces additional features ideal for real-time applications such as High-Speed GPIO, CAN FD, and synchronous parallel NAND/NOR/PSRAM controller. The i.MX RT1062 runs on the Arm® Cortex-M7® core up to 600 MHz.

Hardware

• MIMXRT1062DVL6B MCU (600 MHz, 1024 KB on-chip memory)

• Memory

  • 256 Mbit SDRAM

  • 512 Mbit Hyper Flash

  • TF socket for SD card

• Ethernet

  • 10/100 Mbit/s Ethernet PHY

• USB

  • USB 2.0 OTG connector

  • USB 2.0 host connector

• Audio

  • 3.5 mm audio stereo headphone jack

  • Board-mounted microphone

  • Left and right speaker out connectors

• Power

  • 5 V DC jack

• Debug

  • JTAG 20-pin connector

  • OpenSDA with DAPLink

• Sensor

  • BMI088 6-axis e-compass

• Expansion port

  • Arduino interface

• CAN bus connector

For more information about the MIMXRT1062 SoC and MIMXRT1062-FMURT6 board, see these references:

• i.MX RT1060 Website

• i.MX RT1060 Reference Manual

• MIMXRT1062-FMURT6 User Guide

• MIMXRT1062-FMURT6 Schematics

Supported Features

The mimxrt1062_fmurt6 board supports the hardware features listed below.

on-chip / on-board

Feature integrated in the SoC / present on the board.

2 / 2

Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.

vnd,foo

Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

mimxrt1062_fmurt6

/

mimxrt1062

mimxrt1062_fmurt6/mimxrt1062 target

Type	Location	Description	Compatible
CPU	on-chip	ARM Cortex-M7 CPU1	arm,cortex-m7
ADC	on-chip	NXP MCUA 12B1MSPS SAR ADC1 1	nxp,mcux-12b1msps-sar
ARM architecture	on-chip	MCUX XBAR (Crossbar)3	nxp,mcux-xbar
CAN	on-chip	NXP FlexCAN controller1 1	nxp,flexcan
	on-chip	NXP FlexCAN CANFD controller1	nxp,flexcan-fd
Clock control	on-chip	i.MX CCM (Clock Controller Module) IP node1	nxp,imx-ccm
	on-chip	Generic fixed factor clock provider3	fixed-factor-clock
	on-chip	i.MX CCM Fractional PLL1	nxp,imx-ccm-fnpll
	on-chip	i.MX ANATOP (Analog Clock Controller Module) IP node1	nxp,imx-anatop
	on-chip	Generic fixed-rate clock provider4	fixed-clock
Counter	on-chip	NXP MCUX Quad Timer (QTMR)4	nxp,imx-qtmr
	on-chip	NXP MCUX Quad Timer Channel16	nxp,imx-tmr
	on-chip	NXP Periodic Interrupt Timer (PIT)1	nxp,pit
	on-chip	Child node for the Periodic Interrupt Timer node, intended for an individual timer channel4	nxp,pit-channel
Cryptographic accelerator	on-chip	NXP Data Co-Processor (DCP) Crypto accelerator1	nxp,mcux-dcp
Debug	on-chip	ARMv7 instrumentation trace macrocell1	arm,armv7m-itm
Display	on-chip	NXP i.MX eLCDIF (Enhanced LCD Interface) controller1	nxp,imx-elcdif
DMA	on-chip	NXP MCUX EDMA controller1	nxp,mcux-edma
	on-chip	NXP PXP 2D DMA engine1	nxp,pxp
Ethernet	on-chip	NXP ENET IP Module2	nxp,enet
	on-chip	NXP ENET MAC/L2 Device1 1	nxp,enet-mac
	on-chip	NXP ENET PTP (Precision Time Protocol) Clock2	nxp,enet-ptp-clock
	on-board	Generic MII PHY1	ethernet-phy
GPIO & Headers	on-chip	i.MX GPIO9	nxp,imx-gpio
I2C	on-chip	NXP LPI2C controller3 1	nxp,lpi2c
I2S	on-chip	NXP mcux SAI-I2S controller3	nxp,mcux-i2s
Interrupt controller	on-chip	ARMv7-M NVIC (Nested Vectored Interrupt Controller)1	arm,v7m-nvic
LED	on-board	Group of GPIO-controlled LEDs1	gpio-leds
MDIO	on-chip	NXP ENET MDIO Features1 1	nxp,enet-mdio
Memory controller	on-chip	NXP FlexRAM on-chip ram controller If the flexram,bank-spec property is specified, then the flexram will be dynamically reconfigured to the configuration specified at runtime1	nxp,flexram
	on-chip	NXP Smart External Memory Controller (SEMC)1	nxp,imx-semc
Miscellaneous	on-chip	NXP FlexIO controller3	nxp,flexio
MMU / MPU	on-chip	ARMv7-M Memory Protection Unit (MPU)1	arm,armv7m-mpu
MTD	on-board	NXP FlexSPI HyperFlash1	nxp,imx-flexspi-hyperflash
	on-board	Fixed partitions of a flash (or other non-volatile storage) memory1	fixed-partitions
Pin control	on-chip	This compatible binding should be applied to the device’s iomuxc DTS node1	nxp,imx-iomuxc
	on-chip	The node has the ‘pinctrl’ node label set in MCUX RT SoC’s devicetree1	nxp,mcux-rt-pinctrl
	on-chip	i.MX IOMUXC1	nxp,imx-gpr
PWM	on-chip	NXP eFLEX PWM module with mcux-pwm submodules4	nxp,flexpwm
	on-chip	NXP MCUX PWM8 8	nxp,imx-pwm
Regulator	on-board	Fixed voltage regulators6	regulator-fixed
RNG	on-chip	Kinetis TRNG (True Random Number Generator)1	nxp,kinetis-trng
RTC	on-chip	NXP SNVS LP/HP RTC1	nxp,imx-snvs-rtc
SDHC	on-chip	NXP imx USDHC controller1 1	nxp,imx-usdhc
Sensors	on-board	Bosch BMP388 pressure sensor accessed through I2C bus1	bosch,bmp388
	on-board	Bosch BMM150 Geomagnetic sensor1	bosch,bmm150
	on-board	STMicroelectronics ISM330DHCX 6-axis IMU (Inertial Measurement Unit) sensor accessed through SPI bus1	st,ism330dhcx
	on-chip	NXP MCUX QDEC4	nxp,mcux-qdec
	on-chip	NXP on-die temperature monitor1	nxp,tempmon
Serial controller	on-chip	NXP LPUART4 4	nxp,lpuart
SPI	on-chip	NXP FlexSPI controller1 1	nxp,imx-flexspi
	on-chip	NXP LPSPI controller2 2	nxp,lpspi
Timer	on-chip	ARMv7-M System Tick1	arm,armv7m-systick
	on-chip	NXP MCUX General-Purpose HW Timer (GPT)1	nxp,gpt-hw-timer
	on-chip	NXP MCUX General-Purpose Timer (GPT)1	nxp,imx-gpt
USB	on-chip	NXP EHCI USB device mode1 1	nxp,ehci
	on-chip	NXP USB high speed phy that is used on NXP RTxxxx, RTxxx, MCX, LPC and Kinetis platforms if high speed usb is supported on these platforms2	nxp,usbphy
Video	on-chip	NXP MCUX CMOS sensor interface1	nxp,imx-csi
Watchdog	on-chip	imxRT watchdog1 1	nxp,imx-wdog

Note

For additional features not yet supported, please also refer to the MIMXRT1064-EVK , which is the superset board in NXP’s i.MX RT10xx family. NXP prioritizes enabling the superset board with NXP’s Full Platform Support for Zephyr. Therefore, the mimxrt1064_evk board may have additional features already supported, which can also be re-used on this mimxrt1060_evk board.

Connections and I/Os

The MIMXRT1062 SoC has five pairs of pinmux/gpio controllers.

Name	Function	Usage
GPIO_AD_B1_08	FLEXCAN1 TX	CAN
GPIO_B0_03	FLEXCAN1 RX	CAN
GPIO_AD_B0_06	PWM2A0	PWM
GPIO_EMC_08	PWM2A1	PWM
GPIO_EMC_10	PWM2A2	PWM
GPIO_AD_B0_09	PWM2A3	PWM
GPIO_EMC_31	LPUART7_TX	UART Console
GPIO_EMC_32	LPUART7_RX	UART Console
GPIO_B0_04	LPI2C2_SCL	I2C
GPIO_B0_05	LPI2C2_SDA	I2C
GPIO_AD_B1_00	LPI2C1_SCL	I2C
GPIO_AD_B1_01	LPI2C1_SDA	I2C
GPIO_AD_B0_12	LPI2C4_SCL	I2C
GPIO_AD_B0_13	LPI2C4_SDA	I2C
WAKEUP	GPIO	SW0
GPIO_B1_01	ENET_RX_DATA00	Ethernet
GPIO_B1_02	ENET_RX_DATA01	Ethernet
GPIO_B1_03	ENET_RX_EN	Ethernet
GPIO_B0_12	ENET_TX_DATA00	Ethernet
GPIO_B0_13	ENET_TX_DATA01	Ethernet
GPIO_B0_14	ENET_TX_EN	Ethernet
GPIO_B0_15	ENET_REF_CLK	Ethernet
GPIO_B1_00	ENET_RX_ER	Ethernet
GPIO_B1_12	GPIO	SD Card
GPIO_B1_14	USDHC1_VSELECT	SD Card
GPIO_EMC_40	ENET_MDC	Ethernet
GPIO_B0_01	ENET_MDIO	Ethernet
GPIO_SD_B0_00	USDHC1_CMD	SD Card
GPIO_SD_B0_01	USDHC1_CLK	SD Card
GPIO_SD_B0_02	USDHC1_DATA0	SD Card
GPIO_SD_B0_03	USDHC1_DATA1	SD Card
GPIO_SD_B0_04	USDHC1_DATA2	SD Card
GPIO_SD_B0_05	USDHC1_DATA3	SD Card
GPIO_EMC_27	LPSPI1_SCK	SPI
GPIO_EMC_28	LPSPI1_SDO	SPI
GPIO_EMC_29	LPSPI1_SDI	SPI
GPIO_EMC_00	LPSPI2_SCK	SPI
GPIO_EMC_02	LPSPI2_SDO	SPI
GPIO_EMC_03	LPSPI2_SDI	SPI
GPIO_AD_B1_15	LPSPI3_SCK	SPI
GPIO_AD_B1_14	LPSPI3_SDO	SPI
GPIO_AD_B1_13	LPSPI3_SDI	SPI
GPIO_AD_B1_11	ADC	ADC1 Channel 0
GPIO_AD_B1_09	ADC	ADC1 Channel 14
GPIO_AD_B0_15	ADC	ADC1 Channel 4
GPIO_AD_B1_02	UART2_TX_GPS1	UART GPS
GPIO_AD_B1_03	UART2_RX_GPS1	UART GPS

System Clock

The MIMXRT1062 SoC is configured to use SysTick as the system clock source, running at 600MHz.

When power management is enabled, the 32 KHz low frequency oscillator on the board will be used as a source for the GPT timer to generate a system clock. This clock enables lower power states, at the cost of reduced resolution

Serial Port

The MIMXRT1062 SoC has eight UARTs. LPUART7 is configured for the console, LPUART8 and 2 for GPS/MAG, LPUART3 and 4 for Telemetry and the remaining are not used.

Programming and Debugging

Build and flash applications as usual (see Building an Application and Run an Application for more details).

Configuring a Debug Probe

A debug probe is used for both flashing and debugging the board. This board is configured by default to use the OpenSDA DAPLink Onboard Debug Probe, however the pyOCD Debug Host Tools do not yet support programming the external flashes on this board so you must reconfigure the board for one of the following debug probes instead.

Using J-Link

Install the J-Link Debug Host Tools and make sure they are in your search path.

For Hyperflash support on i.MxRT106x use JLink_V780 or above.

There are two options: the onboard debug circuit can be updated with Segger J-Link firmware, or J-Link External Debug Probe can be attached to the FMURT6 on J23 FMU Debug Port. Run JLink.exe and choose device / core as MIMXRT106A-ALEXA.

Configuring a Console

Regardless of your choice in debug probe, we will use the OpenSDA microcontroller as a usb-to-serial adapter for the serial console.

Connect a USB cable from your PC to PixHawk debug adapter.

Use the following settings with your serial terminal of choice (minicom, putty, etc.):

• Speed: 115200

• Data: 8 bits

• Parity: None

• Stop bits: 1

Using SWO

SWO can be used as a logging backend, by setting CONFIG_LOG_BACKEND_SWO=y. Your SWO viewer should be configured with a CPU frequency of 132MHz, and SWO frequency of 7500KHz.

Flashing

Here is an example for the Hello World application.

# From the root of the zephyr repository
west build -b mimxrt1062_fmurt6 samples/hello_world
west flash

Open a serial terminal, reset the board (press the SW9 button), and you should see the following message in the terminal:

***** Booting Zephyr OS v3.20.0 *****
Hello World! mimxrt1062_fmurt6

Debugging

Here is an example for the Hello World application.

# From the root of the zephyr repository
west build -b mimxrt1062_fmurt6 samples/hello_world
west debug

Open a serial terminal, step through the application in your debugger, and you should see the following message in the terminal:

***** Booting Zephyr OS v3.20.0 *****
Hello World! mimxrt1062_fmurt6

Troubleshooting

If the west flash or debug commands fail, and the command hangs while executing runners.jlink, confirm the J-Link debug probe is configured, powered, and connected to the FMURT6 properly.

Support Resources for Zephyr

• NXP Zephyr Downstream Software Development Kit

• MCUXpresso for VS Code, wiki documentation and Zephyr lab guides

• NXP Zephyr Knowledge Hub

• NXP’s Zephyr landing page (including training resources)

• NXP Support Community forum for Zephyr