FRDM-MCXW71

Overview

The FRDM-MCXW71 is a compact and scalable development board for rapid prototyping of the MCX W71 wireless MCU. It offers easy evaluation of the MCX W71’s multiprotocol wireless support for Bluetooth LE, Zigbee, Thread and Matter. The board includes an on-board MCU-Link debugger, industry standard headers for easy access to the MCU’s I/Os, an accelerometer, a light sensor and external SPI flash memory.

The MCX W71x family features a 96 MHz Arm® Cortex®-M33 core coupled with a multiprotocol radio subsystem supporting Matter, Thread, Zigbee and Bluetooth LE. The independent radio subsystem, with a dedicated core and memory, offloads the main CPU, preserving it for the primary application and allowing firmware updates to support future wireless standards.

Hardware

  • MCXW71 Arm Cortex-M33 microcontroller running up to 96 MHz

  • 1MB on-chip Flash memory unit

  • 128 KB TCM RAM

  • On-board MCU-Link debugger with CMSIS-DAP

For more information about the MCXW71 SoC and FRDM-MCXW71 board, see:

Supported Features

The frdm_mcxw71 board supports the hardware features listed below.

on-chip / on-board
Feature integrated in the SoC / present on the board.
2 / 2
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.
vnd,foo
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.
frdm_mcxw71
/
mcxw716c

Type

Location

Description

Compatible

CPU

on-chip

ARM Cortex-M33F CPU1

arm,cortex-m33f

ADC

on-chip

LPC LPADC1

nxp,lpc-lpadc

ARM architecture

on-chip

NXP NBU interruption information1

nxp,nbu

Bluetooth

on-chip

NXP BLE HCI information1

nxp,hci-ble

CAN

on-chip

NXP FlexCAN controller1

nxp,flexcan

Clock control

on-chip

NXP K4 Generation SCG (System Clock Generator) IP node1

nxp,scg-k4

Counter

on-chip

NXP LPTMR1 1

nxp,lptmr

Flash controller

on-chip

NXP MSF1 Flash Memory Module (FMU)1

nxp,msf1

GPIO & Headers

on-chip

Kinetis GPIO2 2

nxp,kinetis-gpio

I2C

on-chip

NXP LPI2C controller1 1

nxp,lpi2c

IEEE 802.15.4

on-chip

NXP MCXW71 IEEE 802.15.4 node1

nxp,mcxw-ieee802154

Input

on-board

Group of GPIO-bound input keys1

gpio-keys

Interrupt controller

on-chip

ARMv8-M NVIC (Nested Vectored Interrupt Controller)1

arm,v8m-nvic

LED

on-board

Group of GPIO-controlled LEDs1

gpio-leds

on-board

Group of PWM-controlled LEDs1

pwm-leds

MMU / MPU

on-chip

ARMv8-M MPU (Memory Protection Unit)1

arm,armv8m-mpu

MTD

on-chip

Flash node1

soc-nv-flash

on-board

Fixed partitions of a flash (or other non-volatile storage) memory1

fixed-partitions

on-board

Properties supporting Zephyr spi-nor flash driver (over the Zephyr SPI API) control of serial flash memories using the standard M25P80-based command set1

jedec,spi-nor

Pin control

on-chip

NXP PORT Pin Controller4

nxp,port-pinmux

on-chip

NXP PORT Pin Controller1

nxp,port-pinctrl

PWM

on-chip

MCUX Timer/PWM Module (TPM)1 1

nxp,kinetis-tpm

Regulator

on-chip

NXP VREF SOC peripheral1

nxp,vref

RNG

on-chip

NXP ELE (EdgeLock secure enclave) TRNG (True Random Number Generator)1

nxp,ele-trng

RTC

on-chip

NXP Real Time Clock (RTC)1

nxp,rtc

Sensors

on-board

FXLS8974 3-axis accelerometer sensor1

nxp,fxls8974

Serial controller

on-chip

NXP LPUART2

nxp,lpuart

SPI

on-chip

NXP LPSPI controller1 1

nxp,lpspi

SRAM

on-chip

Generic on-chip SRAM description2

mmio-sram

Timer

on-chip

ARMv8-M System Tick1

arm,armv8m-systick

Watchdog

on-chip

NXP watchdog (WDOG32)1 1

nxp,wdog32

Fetch Binary Blobs

To support Bluetooth, frdm_mcxw71 requires fetching binary blobs, which can be achieved by running the following command:

west blobs fetch hal_nxp

Programming and Debugging

Build and flash applications as usual (see Building an Application and Run an Application for more details).

Configuring a Debug Probe

A debug probe is used for both flashing and debugging the board. This board is configured by default to use the MCU-Link CMSIS-DAP Onboard Debug Probe.

Using LinkServer

Linkserver is the default runner for this board, and supports the factory default MCU-Link firmware. Follow the instructions in MCU-Link CMSIS-DAP Onboard Debug Probe to reprogram the default MCU-Link firmware. This only needs to be done if the default onboard debug circuit firmware was changed. To put the board in DFU mode to program the firmware, short jumper J5.

Configuring a Console

Connect a USB cable from your PC to J10, and use the serial terminal of your choice (minicom, putty, etc.) with the following settings:

  • Speed: 115200

  • Data: 8 bits

  • Parity: None

  • Stop bits: 1

Application Building

Openthread applications

# From the root of the zephyr repository
west build -b frdm_mcxw71 samples/net/sockets/echo_server -- -DEXTRA_CONF_FILE=overlay-ot.conf

# From the root of the zephyr repository
west build -b frdm_mcxw71 samples/net/sockets/echo_client -- -DEXTRA_CONF_FILE=overlay-ot.conf

Application Flashing

Here is an example for the Hello World application.

# From the root of the zephyr repository
west build -b frdm_mcxw71/mcxw716c samples/hello_world
west flash

Open a serial terminal, reset the board (press the RESET button), and you should see the following message in the terminal:

*** Booting Zephyr OS build v3.7.0-xxx-xxxx ***
Hello World! frdm_mcxw71/mcxw716c

Debugging

Here is an example for the Hello World application.

# From the root of the zephyr repository
west build -b frdm_mcxw71/mcxw716c samples/hello_world
west debug

Open a serial terminal, step through the application in your debugger, and you should see the following message in the terminal:

*** Booting Zephyr OS build v3.7.0-xxx-xxxx ***
Hello World! frdm_mcxw71/mcxw716c

NBU Flashing

BLE functionality requires to fetch binary blobs, so make sure to follow the Fetch Binary Blobs section first.

Two images must be written to the board: one for the host (CM33) and one for the NBU (CM3).

  • To flash the application (CM33) refer to the Application Flashing section above.

  • To flash the NBU Flashing, follow the instructions below:

    • Install blhost from NXP’s website. This is the tool that will allow you to flash the NBU.

    • Enter ISP mode. To boot the MCU in ISP mode, follow these steps:

      • Disconnect the FRDM-MCXW71 board from all power sources.

      • Keep the SW3 (ISP) button on the board pressed, while connecting the board to the host computer USB port.

      • Release the SW3 (ISP) button. The MCXW71 MCU boots in ISP mode.

      • Reconnect any external power supply, if needed.

    • Use the following command to flash NBU file:

Flash BLE only NBU on Windows
blhost.exe -p COMxx -- receive-sb-file mcxw71_nbu_ble.sb3

Please consider changing COMxx on Windows or ttyxx on Linux to the serial port used by your board.

The NBU files can be found in : <zephyr workspace>/modules/hal/nxp/zephyr/blobs/mcxw71/ folder.

For more details:

Troubleshooting

Using Segger SystemView and RTT

Note that when using SEGGER SystemView or RTT with this SOC, the RTT control block address must be set manually within SystemView or the RTT Viewer. The address provided to the tool should be the location of the _SEGGER_RTT symbol, which can be found using a debugger or by examining the zephyr.map file output by the linker.

The RTT control block address must be provided manually because this SOC supports ECC RAM. If the SEGGER tooling searches the ECC RAM space for the control block a fault will occur, provided that ECC is enabled and the RAM segment being searched has not been initialized to a known value.

Support Resources for Zephyr

References