SR100 RDK
Overview
The Synaptics Astra™ SR100 Series of AI MCUs is designed to deliver high-performance, AI-Native, multimodal compute to consumer, enterprise, and industrial Internet of Things (IoT) workloads.
The Astra Machina Micro SR100 Evaluation Platform Kit features the following key components:
Synaptics SR110 (122-FCCSP) Audio & Vision AI processor
Debug IC Synaptics SR100 (84-WCCSP)
Storage: 128 Mbit QSPI NOR Flash
PMIC: Buck-Boost DC/DC for SR100 VBAT
Highly sensitive ambient light sensor: TCS34303
3-axis accelerometer: MC3479
M.2 E-key 2230 receptacle: Supports SDIO, UART, and PCM for Wi-Fi/BT modules
2x USB 2.0 Type-C™ ports: Peripheral mode (Hi-Speed) and system power input
Push buttons for system reset and wake-up
Slide switches for image programming, mute control, and debugging
Several LEDs, including two user-controllable LEDs
Daughter card interface options:
2x MIPI CSI-2® 2-lane RX interfaces (1.5 Gb/s max bandwidth): CSI0 on Samtec™ connector (shared with DVP), CSI1 on 15-pin FPC connector
1x MIPI CSI-2® TX interface (1.5 Gb/s max bandwidth) on 15-pin FPC connector
SWD JTAG daughter card for debugging
2x 20-pin headers with GPIOs are for additional application
4-pin header for UART debugging
3-pin header for PIR
System power supply:
USB Type-C
2-pin, 2.0 mm pitch header for 1-cell Li-ion battery
3-pin header for system power source selection
More information about Astra MCU series and the evaluation board can be found at the Synaptics website [1].
Supported Features
The sr100_rdk board supports the hardware features listed below.
- on-chip / on-board
- Feature integrated in the SoC / present on the board.
- 2 / 2
-
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files. -
vnd,foo -
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.
sr100_rdk/sr100 target
Type |
Location |
Description |
Compatible |
|---|---|---|---|
CPU |
on-chip |
ARM Cortex-M55 CPU1 |
|
on-chip |
ARM Cortex-M4 CPU1 |
||
Clock control |
on-chip |
Synaptics SR100 Clock Controller1 |
|
GPIO & Headers |
on-chip |
Synopsys DesignWare GPIO2 |
|
I2C |
on-chip |
Synopsys DesignWare I2C3 |
|
Interrupt controller |
on-chip |
ARMv8.1-M NVIC (Nested Vectored Interrupt Controller)1 |
|
Pin control |
on-chip |
Synaptics SR100 Pin controller Node Based on pincfg-node.yaml binding4 |
|
Reset controller |
on-chip |
Synaptics SR100 Reset Driver1 |
|
Serial controller |
on-chip |
||
SPI |
on-chip |
Synopsys DesignWare SPI controller2 |
|
SRAM |
on-chip |
Generic on-chip SRAM2 |
|
Timer |
on-chip |
ARMv8.1-M System Tick1 |
|
USB |
on-chip |
DesignWare OTG USB 2.0 controller1 |
Connections and IOs
A detailed description on the hardware connections, IOs and peripherals can be found on the Synaptics Astra MCU website [2].
Programming and Debugging
The sr100_rdk board supports the runners and associated west commands listed below.
| flash | debug | rtt | attach | debugserver | |
|---|---|---|---|---|---|
| openocd | ✅ (default) | ✅ (default) | ✅ | ✅ | ✅ |
Building
To build an application, use the standard Zephyr command. Here is an example for the Hello World application.
# From the root of the zephyr repository
west build -b sr100_rdk samples/hello_world
Flashing
Connect the board using the USB-C connector to your host machine. Make sure you can see the
CMSIS-DAP endpoint using lsusb:
$ lsusb | grep CMSIS-DAP
Bus 001 Device 058: ID cafe:4006 Synaptics, Inc SR100 CMSIS-DAP
Next, run the west debugserver command.
# From the root of the zephyr repository
west build -b sr100_rdk samples/hello_world
west debugserver
Now, in a separate terminal, run the flashing script provided by Synaptics:
python openocd_flash.py build/zephyr/zephyr.bin 0x0 0x0 1