PocketBeagle 2
Overview
PocketBeagle 2 is a computational platform powered by a TI AM6254 SoC.
(NOTE: Rev A0 used a TI AM6232 SoC and is no longer available. Rev A1 uses a TI AM6254 SoC.)
See the PocketBeagle 2 Product Page for details.
Hardware
PocketBeagle 2 features the TI AM62x SoC based around an Arm Cortex-A53 multicore cluster with an Arm Cortex-M4F microcontroller, Imagination Technologies AXE-1-16 graphics processor and TI programmable real-time unit subsystem microcontroller cluster coprocessors.
Additionally, PocketBeagle 2 also contains an MSPM0L1105 SoC which serves as EEPROM and ADC.
Zephyr is enabled to run on:
Arm Cortex-A53 cores on AM62x,
Arm Cortex-M4F core on AM62x, and
Arm Cortex-M0+ core on MSPM0L1105.
Currently supported PocketBeagle 2 revisions:
A0: Comes with SOC AM6232. Discontinued.
A1: Comes with SOC AM6254
Supported Features
The pocketbeagle_2 board supports the hardware features listed below.
- on-chip / on-board
- Feature integrated in the SoC / present on the board.
- 2 / 2
-
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files. -
vnd,foo -
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.
pocketbeagle_2@A0/am6232/a53 target
Type |
Location |
Description |
Compatible |
|---|---|---|---|
CPU |
on-chip |
ARM Cortex-A53 CPU2 |
|
GPIO & Headers |
on-chip |
||
I2C |
on-chip |
||
Interrupt controller |
on-chip |
ARM Generic Interrupt Controller v31 |
|
LED |
on-board |
Group of GPIO-controlled LEDs1 |
|
Mailbox |
on-chip |
TI OMAP MAILBOX1 |
|
Pin control |
on-chip |
TI K3 Pin Controller1 |
|
Power management CPU operations |
on-chip |
Power State Coordination Interface (PSCI) version 1.11 |
|
Serial controller |
on-chip |
||
Timer |
on-chip |
per-core ARM architected timer1 |
|
Watchdog |
on-chip |
K3 Watchdog timer (RTI module) available in the K3 generation of processors1 4 |
pocketbeagle_2@A0/am6232/m4 target
Type |
Location |
Description |
Compatible |
|---|---|---|---|
CPU |
on-chip |
ARM Cortex-M4F CPU1 |
|
Clock control |
on-chip |
Generic fixed-rate clock provider1 |
|
GPIO & Headers |
on-chip |
GPIO Controller for Davinci and Keystone devices3 |
|
I2C |
on-chip |
TI OMAP I2C Controller5 |
|
Interrupt controller |
on-chip |
ARMv7-M NVIC (Nested Vectored Interrupt Controller)1 |
|
Mailbox |
on-chip |
TI OMAP MAILBOX1 |
|
Pin control |
on-chip |
TI K3 Pin Controller1 |
|
Serial controller |
on-chip |
||
SRAM |
on-chip |
Generic on-chip SRAM2 |
|
Timer |
on-chip |
ARMv7-M System Tick1 |
|
Watchdog |
on-chip |
K3 Watchdog timer (RTI module) available in the K3 generation of processors1 5 |
pocketbeagle_2@A1/am6254/a53 target
Type |
Location |
Description |
Compatible |
|---|---|---|---|
CPU |
on-chip |
ARM Cortex-A53 CPU4 |
|
GPIO & Headers |
on-chip |
||
I2C |
on-chip |
||
Interrupt controller |
on-chip |
ARM Generic Interrupt Controller v31 |
|
LED |
on-board |
Group of GPIO-controlled LEDs1 |
|
Mailbox |
on-chip |
TI OMAP MAILBOX1 |
|
Pin control |
on-chip |
TI K3 Pin Controller1 |
|
Power management CPU operations |
on-chip |
Power State Coordination Interface (PSCI) version 1.11 |
|
Serial controller |
on-chip |
||
Timer |
on-chip |
per-core ARM architected timer1 |
|
Watchdog |
on-chip |
K3 Watchdog timer (RTI module) available in the K3 generation of processors1 4 |
pocketbeagle_2@A1/am6254/m4 target
Type |
Location |
Description |
Compatible |
|---|---|---|---|
CPU |
on-chip |
ARM Cortex-M4F CPU1 |
|
Clock control |
on-chip |
Generic fixed-rate clock provider1 |
|
GPIO & Headers |
on-chip |
GPIO Controller for Davinci and Keystone devices3 |
|
I2C |
on-chip |
TI OMAP I2C Controller5 |
|
Interrupt controller |
on-chip |
ARMv7-M NVIC (Nested Vectored Interrupt Controller)1 |
|
Mailbox |
on-chip |
TI OMAP MAILBOX1 |
|
Pin control |
on-chip |
TI K3 Pin Controller1 |
|
Serial controller |
on-chip |
||
SRAM |
on-chip |
Generic on-chip SRAM2 |
|
Timer |
on-chip |
ARMv7-M System Tick1 |
|
Watchdog |
on-chip |
K3 Watchdog timer (RTI module) available in the K3 generation of processors1 5 |
pocketbeagle_2@A1/mspm0l1105 target
Type |
Location |
Description |
Compatible |
|---|---|---|---|
CPU |
on-chip |
ARM Cortex-M0+ CPU1 |
|
Clock control |
on-chip |
||
on-chip |
|||
GPIO & Headers |
on-chip |
TI MSPM0 GPIO3 |
|
Interrupt controller |
on-chip |
ARMv6-M NVIC (Nested Vectored Interrupt Controller) controller1 |
|
Pin control |
on-chip |
TI MSPM0 pinctrl node1 |
|
RTC |
on-chip |
Texas Instruments MSPM0 RTC Driver1 |
|
Serial controller |
on-chip |
TI MSPM0 UART1 |
|
SRAM |
on-chip |
Generic on-chip SRAM1 |
|
Timer |
on-chip |
ARMv6-M System Tick1 |
Devices
System Clock
This board configuration uses a system clock frequency of 400 MHz.
DDR RAM
The board has 512MB of DDR RAM available. This board configuration allocates Zephyr 4kB of RAM (only for resource table: 0x9CC00000 to 0x9CC00400).
Serial Port
A53 Cores
This board configuration uses single serial communication channel with the MAIN domain UART (MAIN_UART6, i.e. debug port).
M4F Core
This board configuration uses a single serial communication channel with the MCU domain UART (MCU_UART0, i.e. P2.05 as RX and P2.07 as TX).
SD Card
A53 Cores
Download BeagleBoard.org’s official BeagleBoard Imaging Utility to create bootable SD-card with the Zephyr image. Optionally, the Zephyr SD Card images can be downloaded from bb-zephyr-images.
M4F Core
Download BeagleBoard.org’s official BeagleBoard Imaging Utility to create bootable SD-card with the Linux distro image. This will boot Linux on the A53 application cores. These cores will then load the Zephyr binary on the M4 core using remoteproc.
MSPM0L1105
Download BeagleBoard.org’s official BeagleBoard Imaging Utility to create bootable SD-card with the Linux distro image. This will boot Linux on the A53 application cores. We can then flash MSPM0L1105 firmware from Linux using BSL over I2C. The BeagleBoard.org distro images ship with a driver that supports Firmware Upload API for MSPM0L1105.
Flashing
A53 Core
The testing requires the binary to be copied to the BOOT partition in SD card.
To test the A53 core, we build the Hello World sample with the following command.
# From the root of the zephyr repository
west build -b pocketbeagle_2/am6254/a53 samples/hello_world
We now copy this binary onto the SD card in the /boot/ directory and name it as
zephyr.bin.
# Mount the SD card at sdcard for example
sudo mount /dev/sdX sdcard
# copy the bin to the /boot/
sudo cp --remove-destination zephyr.bin sdcard/boot/zephyr.bin
The SD card can now be used for booting.
The binary will run and print Hello world to the debug port.
M4F Core
The board supports remoteproc using the OpenAMP resource table.
The testing requires the binary to be copied to the SD card to allow the A53 cores to load it while booting using remoteproc.
To test the M4F core, we build the Hello World sample with the following command.
# From the root of the zephyr repository
west build -b pocketbeagle_2/am6254/m4 samples/hello_world
This builds the program and the binary is present in the build/zephyr directory as
zephyr.elf.
We now copy this binary onto the SD card in the /lib/firmware directory and name it as
am62-mcu-m4f0_0-fw.
# Mount the SD card at sdcard for example
sudo mount /dev/sdX sdcard
# copy the elf to the /lib/firmware directory
sudo cp --remove-destination zephyr.elf sdcard/lib/firmware/am62-mcu-m4f0_0-fw
The SD card can now be used for booting. The binary will now be loaded onto the M4F core on boot.
The binary will run and print Hello world to the MCU_UART0 port.
MSPM0L1105
Note
On PocketBeagle 2 MSPM0L1105 is used as EEPROM and ADC. So flashing any custom firmware will break this functionality.
Note
Flashing new firmware will also clear the EEPROM contents. So please make backup of EEPROM data before attempting to flash firmware to MSPM0L1105.
To test the A53 cores, we build the Minimal footprint sample with the following command.
# From the root of the zephyr repository
west build -b pocketbeagle_2/mspm0l1105 samples/basic/minimal
This builds the program and the binary is present in the build/zephyr directory as
zephyr.bin.
We now flash this binary using FW Upload API.
echo 1 > /sys/class/firmware/mspm0l1105/loading
dd if=zephyr.bin of=/sys/class/firmware/mspm0l1105/data
echo 0 > /sys/class/firmware/mspm0l1105/loading
Debugging
M4F Core
The board supports debugging M4 core from the A53 cores running Linux. Since the target needs superuser privilege, OpenOCD needs to be launched separately for now:
sudo openocd -f board/ti_am625_swd_native.cfg
Start debugging
west build -b pocketbeagle_2/am6254/m4
west debug
MSPM0L1105
Before beginning to debug, the devicetree overlay k3-am62-pocketbeagle2-mspm0swd.dtbo needs to be
applied to enable the SWD pins. This can be done by adding the following entry to
/boot/firmware/extlinux/extlinux.conf:
label msmp0
kernel /Image.gz
append console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02860000 root=/dev/mmcblk1p3 ro rootfstype=ext4 fsck.repair=yes resume=/dev/mmcblk1p2 rootwait net.ifnames=0
fdtdir /
fdtoverlays /overlays/k3-am62-pocketbeagle2-mspm0swd.dtbo
After saving changes to /boot/firmware/extlinux/extlinux.conf, this boot entry can be
selected using one of the following ways:
Setting it as default entry in
/boot/firmware/extlinux/extlinux.conf.Selecting the entry over UART in the bootmenu.
The board supports debugging MSPM0L1105 from the A53 cores running Linux. Since OpenOCD shipped with Zephyr does not support sysfsgpio driver, OpenOCD needs to be launched separately for now:
openocd -f board/beagle/pocketbeagle_2/support/mspm0l1105.cfg
Start debugging
west build -b pocketbeagle_2/mspm0l1105
west debug
Note
The MSPM0 ADC EEPROM firmware shipped by default disables SWD debugging. So for the above
instructions to work, a firmware that enables SWD debugging needs to be flashed. This can be done
by using linux FW UPLOAD API exposed at /sys/class/firmware/mspm0l1105.
Alternatively, one can get the same effect by doing a power-on-reset on the MSPM0l1105.