Pebble Time 2

Board Overview

Pebble Time 2

Name:

pt2

Vendor:

Core Devices LLC

Architecture:

arm

SoC:

sf32lb52jud6

Browse board sources

Overview

Pebble Time 2 is a smart watch based on the SF32LB52x series chip SoC.

More information about the watch can be found at the RePebble website [1].

Hardware

Pebble Time 2 provides the following hardware components:

• SiFli SF32LB52JUD6

• nPM1300 PMIC for power supply and battery charging

• GD25Q256E 256 Mb QSPI NOR

• JDI LPM015M135A Memory-in-Pixel (MiP) 64-color display

• CST816D capacitive touch display driver

• RGB backlight driven by AW2016

• W1160 ambient light sensor

• 4 physical buttons

• LSM6DSOW IMU (accelerometer/gyroscope)

• LIS2DW12 low-power accelerometer

• MMC5603NJ magnetometer

• Dual PDM microphone

• Speaker driven by AW8155BFCR amplifier

• LRA driven by AW86225CSR

• GH3026 heart-rate monitor sensor

• Programming connector

Supported Features

The pt2 board supports the hardware features listed below.

on-chip / on-board

Feature integrated in the SoC / present on the board.

2 / 2

Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.

vnd,foo

Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

pt2/sf32lb52jud6 target

Type	Location	Description	Compatible
CPU	on-chip	ARM Cortex-M33 CPU1	arm,cortex-m33
Clock control	on-chip	SiFli Reset and Clock Controller (RCC) is a multi-function peripheral in charge of reset control and clock control for all SoC peripherals1	sifli,sf32lb-rcc-clk
	on-chip	SiFli DLL is a digital phase-locked loop peripheral, controlled by the RCC1 1	sifli,sf32lb-dll
	on-chip	Generic fixed-rate clock provider3 1	fixed-clock
	on-chip	SiFli SF32LB HXT48 clock1	sifli,sf32lb-hxt48
DMA	on-chip	SF32LB DMA Controller1	sifli,sf32lb-dmac
GPIO & Headers	on-chip	SF32LB GPIO (parent)1	sifli,sf32lb-gpio-parent
	on-chip	SF32LB GPIO1 1	sifli,sf32lb-gpio
Input	on-board	Group of GPIO-bound input keys1	gpio-keys
Interrupt controller	on-chip	ARMv8-M NVIC (Nested Vectored Interrupt Controller)1	arm,v8m-nvic
Multi-Function Device	on-chip	SiFli SF32LB RCC (Reset and Clock Control) if a multi-function peripheral in charge of reset and clock control for all SoC peripherals1	sifli,sf32lb-rcc
MMU / MPU	on-chip	ARMv8-M MPU (Memory Protection Unit)1	arm,armv8m-mpu
MTD	on-chip	SiFli SF32LB Memory Peripheral Interface (MPI) in QSPI NOR mode1	sifli,sf32lb-mpi-qspi-nor
	on-board	Generic NOR flash on QSPI bus1	jedec,qspi-nor
	on-board	Fixed partitions of a flash (or other non-volatile storage) memory1	fixed-partitions
Pin control	on-chip	SF32LB52x Pin multiplexer and pin configuration controller (HPSYS_PINMUX)1	sifli,sf32lb52x-pinmux
Power management	on-chip	SiFli SF32LB AON1	sifli,sf32lb-aon
	on-chip	SiFli SF32LB PMUC1	sifli,sf32lb-pmuc
Reset controller	on-chip	SiFli SF32LB Reset Controller1	sifli,sf32lb-rcc-rctl
Retained memory	on-chip	SiFli SF32LB RTC backed retained memory area1	sifli,sf32lb-rtc-backup
RTC	on-chip	SiFli SF32LB RTC1	sifli,sf32lb-rtc
Serial controller	on-chip	SiFli SF32LB USART1 2	sifli,sf32lb-usart
SRAM	on-chip	Generic on-chip SRAM1	mmio-sram
System controller	on-chip	SiFli System Configuration (HPSYS_CFG)1	sifli,sf32lb-cfg
Timer	on-chip	ARMv8-M System Tick1	arm,armv8m-systick
Watchdog	on-chip	This binding describes the Sifli SF32LB watchdog timer (WDT)1	sifli,sf32lb-wdt

Programming and Debugging

The pt2 board supports the runners and associated west commands listed below.

	flash	debug
sftool	✅ (default)

Refer to sftool website [2] for more information.

References

[1]

https://repebble.com/

[2]

https://github.com/OpenSiFli/sftool