CYW920829M2EVK-02
Overview
The CYW920829M2EVK-02 is an evaluation kit for the AIROC™ CYW20829 Bluetooth® LE MCU, featuring an Arm® Cortex®-M33 core running at 96 MHz. It is designed for Bluetooth® Low Energy applications including industrial IoT, smart home, asset tracking, beacons, sensors, and medical devices.
Key features include 2048 KB flash, 1024 KB SRAM, Bluetooth® LE with 10 dBm TX output power (no external PA required), and a comprehensive set of on-board sensors and peripherals.
The board supports Arduino Uno R3 headers and includes an onboard KitProg3 programmer/debugger with micro-B USB connectivity.
The CYW920829M2EVK-02 supports multiple SoC variants:
Build Target |
SoC Variant |
|---|---|
|
CYW20829 B0LKML |
|
CYW20829 B1010 |
|
CYW20829 B1340 |
Hardware
SoC: AIROC CYW20829 Bluetooth® LE MCU (56-pin QFN)
CPU: Arm® Cortex®-M33 at 96 MHz
Flash: 2048 KB
SRAM: 1024 KB
Wireless: Bluetooth® LE (10 dBm TX, no external PA required)
Sensors: 6-axis IMU, thermistor, analog mic, digital mic
USB: Micro-B (power, programming, USB-UART bridge)
Expansion: Arduino Uno R3 compatible headers
User I/O: RGB LED, two user LEDs, two user switches
Debug: Onboard KitProg3 (SWD + USB-UART)
Power: USB powered (3.3V operating)
For more information about the CYW20829 SoC and CYW920829M2EVK-02 board:
Kit Contents
CYW20829 evaluation board (CYW9BTM2BASE3 + CYW920829M2IPA2)
USB Type-A to Micro-B cable
Six jumper wires
Quick start guide
Supported Features
The cyw920829m2evk_02 board supports the hardware features listed below.
- on-chip / on-board
- Feature integrated in the SoC / present on the board.
- 2 / 2
-
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files. -
vnd,foo -
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.
cyw920829m2evk_02/cyw20829b0lkml target
On-target memory for this board target: 240 KiB of RAM, 1 MiB of Flash.
Type |
Location |
Description |
Compatible |
|---|---|---|---|
CPU |
on-chip |
ARM Cortex-M33 CPU1 |
|
ADC |
on-chip |
Infineon Cat1 ADC Each ADC group Cat1 is assigned to a Zephyr device1 |
|
ARM architecture |
on-chip |
Infineon Serial Communication Blocks (SCB) node2 |
|
Bluetooth |
on-chip |
Bluetooth module that uses Infineon CYW208XX HCI bluetooth interface1 |
|
CAN |
on-chip |
Infineon CAN FD controller wrapper. 1 |
|
on-chip |
Infineon MCAN Driver1 |
||
Clock control |
on-chip |
||
on-chip |
Generic fixed factor clock provider9 |
||
on-chip |
infineon peripheral divider15 |
||
Counter |
on-chip |
Infineon TCPWM counter9 |
|
DMA |
on-chip |
Infineon CAT1 DMA1 |
|
Flash controller |
on-board |
Infineon CAT1 QSPI flash controller1 |
|
GPIO & Headers |
on-chip |
||
Input |
on-board |
Group of GPIO-bound input keys1 |
|
Interrupt controller |
on-chip |
ARMv8-M NVIC (Nested Vectored Interrupt Controller)1 |
|
LED |
on-board |
Group of GPIO-controlled LEDs1 |
|
MTD |
on-board |
Flash node2 |
|
on-board |
Fixed partitions of a flash (or other non-volatile storage) memory1 |
||
Pin control |
on-chip |
Infineon CAT1 Pinctrl Container1 |
|
Power management |
on-chip |
Infineon CAT1B power control1 |
|
PWM |
on-chip |
Infineon TCPWM PWM9 |
|
RTC |
on-chip |
Infineon CAT1 family RTC device1 |
|
Serial controller |
on-chip |
Infineon CAT1 UART1 |
|
SRAM |
on-chip |
Generic on-chip SRAM1 |
|
Timer |
on-chip |
ARMv8-M System Tick1 |
|
on-chip |
Infineon low power timer1 |
||
on-chip |
Infineon TCPWM Timer9 |
||
Watchdog |
on-chip |
Infineon CAT1 Watchdog1 |
cyw920829m2evk_02/cyw20829b1010 target
On-target memory for this board target: 240 KiB of RAM, 1 MiB of Flash.
Type |
Location |
Description |
Compatible |
|---|---|---|---|
CPU |
on-chip |
ARM Cortex-M33 CPU1 |
|
ADC |
on-chip |
Infineon Cat1 ADC Each ADC group Cat1 is assigned to a Zephyr device1 |
|
ARM architecture |
on-chip |
Infineon Serial Communication Blocks (SCB) node2 |
|
Bluetooth |
on-chip |
Bluetooth module that uses Infineon CYW208XX HCI bluetooth interface1 |
|
CAN |
on-chip |
Infineon CAN FD controller wrapper. 1 |
|
on-chip |
Infineon MCAN Driver1 |
||
Clock control |
on-chip |
||
on-chip |
Generic fixed factor clock provider9 |
||
on-chip |
infineon peripheral divider15 |
||
Counter |
on-chip |
Infineon TCPWM counter9 |
|
DMA |
on-chip |
Infineon CAT1 DMA1 |
|
Flash controller |
on-board |
Infineon CAT1 QSPI flash controller1 |
|
GPIO & Headers |
on-chip |
||
Input |
on-board |
Group of GPIO-bound input keys1 |
|
Interrupt controller |
on-chip |
ARMv8-M NVIC (Nested Vectored Interrupt Controller)1 |
|
LED |
on-board |
Group of GPIO-controlled LEDs1 |
|
MTD |
on-board |
Flash node2 |
|
on-board |
Fixed partitions of a flash (or other non-volatile storage) memory1 |
||
Pin control |
on-chip |
Infineon CAT1 Pinctrl Container1 |
|
Power management |
on-chip |
Infineon CAT1B power control1 |
|
PWM |
on-chip |
Infineon TCPWM PWM9 |
|
RTC |
on-chip |
Infineon CAT1 family RTC device1 |
|
Serial controller |
on-chip |
Infineon CAT1 UART1 |
|
SRAM |
on-chip |
Generic on-chip SRAM1 |
|
Timer |
on-chip |
ARMv8-M System Tick1 |
|
on-chip |
Infineon low power timer1 |
||
on-chip |
Infineon TCPWM Timer9 |
||
Watchdog |
on-chip |
Infineon CAT1 Watchdog1 |
cyw920829m2evk_02/cyw20829b1340 target
On-target memory for this board target: 240 KiB of RAM, 2 MiB of Flash.
Type |
Location |
Description |
Compatible |
|---|---|---|---|
CPU |
on-chip |
ARM Cortex-M33 CPU1 |
|
ADC |
on-chip |
Infineon Cat1 ADC Each ADC group Cat1 is assigned to a Zephyr device1 |
|
ARM architecture |
on-chip |
Infineon Serial Communication Blocks (SCB) node2 |
|
Bluetooth |
on-chip |
Bluetooth module that uses Infineon CYW208XX HCI bluetooth interface1 |
|
CAN |
on-chip |
Infineon CAN FD controller wrapper. 1 |
|
on-chip |
Infineon MCAN Driver1 |
||
Clock control |
on-chip |
||
on-chip |
Generic fixed factor clock provider9 |
||
on-chip |
infineon peripheral divider15 |
||
Counter |
on-chip |
Infineon TCPWM counter9 |
|
DMA |
on-chip |
Infineon CAT1 DMA1 |
|
Flash controller |
on-chip |
Infineon CAT1 QSPI flash controller1 |
|
GPIO & Headers |
on-chip |
||
Input |
on-board |
Group of GPIO-bound input keys1 |
|
Interrupt controller |
on-chip |
ARMv8-M NVIC (Nested Vectored Interrupt Controller)1 |
|
LED |
on-board |
Group of GPIO-controlled LEDs1 |
|
MTD |
on-chip |
Flash node2 |
|
on-board |
Fixed partitions of a flash (or other non-volatile storage) memory1 |
||
Pin control |
on-chip |
Infineon CAT1 Pinctrl Container1 |
|
Power management |
on-chip |
Infineon CAT1B power control1 |
|
PWM |
on-chip |
Infineon TCPWM PWM9 |
|
RTC |
on-chip |
Infineon CAT1 family RTC device1 |
|
Serial controller |
on-chip |
Infineon CAT1 UART1 |
|
SRAM |
on-chip |
Generic on-chip SRAM1 |
|
Timer |
on-chip |
ARMv8-M System Tick1 |
|
on-chip |
Infineon low power timer1 |
||
on-chip |
Infineon TCPWM Timer9 |
||
Watchdog |
on-chip |
Infineon CAT1 Watchdog1 |
Connections and IOs
LEDs
Name |
GPIO Pin |
|---|---|
LED0 |
P1.1 (active low) |
LED1 |
P5.2 (active low) |
Default Zephyr Peripheral Mapping
Pin |
Function |
Usage |
|---|---|---|
P3.3 |
SCB2 UART TX |
Console TX |
P3.2 |
SCB2 UART RX |
Console RX |
P3.1 |
SCB2 UART RTS |
Console RTS |
P3.0 |
SCB2 UART CTS |
Console CTS |
P1.1 |
GPIO |
LED0 |
P5.2 |
GPIO |
LED1 |
P0.5 |
GPIO |
Button SW1 |
P1.0 |
GPIO |
Button SW2 |
System Clock
The AIROC CYW20829 uses the Internal High-frequency Oscillator (IHO) as the clock source. The clock path is:
FLL: IHO → 96 MHz
CLK_HF0: 96 MHz (system clock)
Serial Port
The AIROC CYW20829 has multiple SCB (Serial Communication Block) interfaces.
The Zephyr console output is assigned to SCB2 (uart2), which is routed
through the KitProg3 USB-UART bridge with hardware flow control.
Default communication settings are 115200 8N1.
Prerequisites
The CYW920829M2EVK-02 requires binary blobs (e.g., Bluetooth controller firmware) to be fetched before building:
west blobs fetch hal_infineon
Note
MCUboot image signing on this board requires cysecuretools (Edge Protect
Tools). Install with: pip install cysecuretools
Building
Here is an example for the Hello World application.
# From the root of the zephyr repository
west build -b cyw920829m2evk_02/cyw20829b0lkml samples/hello_world
Programming and Debugging
The cyw920829m2evk_02 board supports the runners and associated west commands listed below.
| flash | debug | rtt | debugserver | attach | reset | |
|---|---|---|---|---|---|---|
| jlink | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ |
| openocd | ✅ (default) | ✅ (default) | ✅ | ✅ | ✅ |
The CYW920829M2EVK-02 includes an onboard programmer/debugger (KitProg3) which can be used to program and debug the AIROC CYW20829 Cortex-M33 core.
The CYW920829M2EVK-02 also supports RTT via a SEGGER J-Link device, under the
target name cyw20829_tm. This can be enabled by building with the
rtt-console snippet or setting the following Kconfig values:
CONFIG_UART_CONSOLE=n, CONFIG_RTT_CONSOLE=y, and
CONFIG_USE_SEGGER_RTT=y.
west build -p always -b cyw920829m2evk_02/cyw20829b0lkml samples/basic/blinky -S rtt-console
Note
For RTT control block, do not use “Auto Detection”. Instead, set the search range to: RAM RangeStart at 0x20000000 and RAM RangeSize of 0x3d000.
Infineon OpenOCD Installation
The ModusToolbox™ Programming Tools package includes Infineon OpenOCD. Alternatively, a standalone installation can be done by downloading the Infineon OpenOCD release for your system and extracting the files to a location of your choice.
Note
Linux requires device access rights to be set up for KitProg3. This is
handled automatically by the ModusToolbox™ Programming Tools installation.
When doing a standalone OpenOCD installation, this can be done
manually by executing the script openocd/udev_rules/install_rules.sh.
Configuring a Console
Connect a USB cable from your PC to the KitProg3 micro-B USB connector (J5) on the CYW920829M2EVK-02.Use the serial terminal of your choice (minicom, PuTTY, etc.) with the following settings:
Speed: 115200
Data: 8 bits
Parity: None
Stop bits: 1
Flashing
One time, set the Infineon OpenOCD path:
west config build.cmake-args -- "-DOPENOCD=path/to/infineon/openocd/bin/openocd.exe"
Build and flash the application:
west build -b cyw920829m2evk_02/cyw20829b0lkml -p always samples/hello_world
west flash
One time, set the Infineon OpenOCD path:
west config build.cmake-args -- -DOPENOCD=path/to/infineon/openocd/bin/openocd
Build and flash the application:
west build -b cyw920829m2evk_02/cyw20829b0lkml -p always samples/hello_world
west flash
You should see the following message on the console:
*** Booting Zephyr OS build vX.Y.Z ***
Hello World! cyw920829m2evk_02
Debugging
# From the root of the zephyr repository
west build -b cyw920829m2evk_02/cyw20829b0lkml samples/hello_world
west debug
Once the GDB console starts, you may set breakpoints and perform standard GDB debugging on the AIROC CYW20829 Cortex-M33 core.
Operate in SECURE Lifecycle Stage
The device lifecycle stage (LCS) is a key aspect of the security of the AIROC CYW20829 Bluetooth® MCU. The lifecycle stages follow a strict, irreversible progression dictated by the programming of the eFuse bits (changing the value from “0” to “1”). This system is used to protect the device’s data and code at the level required by the user. SECURE is the lifecycle stage of a secured device.
Follow the instructions in AN239590 Provision CYW20829 to SECURE LCS to transition the device to SECURE LCS. In the SECURE LCS stage, the protection state is set to secure. A secured device will only boot if the authentication of its flash content is successful.
The following configuration options can be used to build for a device which has been provisioned to SECURE LCS and configured to use an encrypted flash interface:
CONFIG_INFINEON_SECURE_LCS: Enable if the target device is in SECURE LCSCONFIG_INFINEON_SECURE_POLICY: Path to the policy JSON file, which was created for provisioning the device to SECURE LCS (refer to section 3.2 “Key creation” of AN239590 Provision CYW20829 to SECURE LCS)CONFIG_INFINEON_SMIF_ENCRYPTION: Enable to use encrypted flash interface when provisioned to SECURE LCS
Here is an example for building the Blinky sample application for SECURE LCS:
# From the root of the zephyr repository
west build -b cyw920829m2evk_02/cyw20829b0lkml -p always samples/basic/blinky -- -DCONFIG_INFINEON_SECURE_LCS=y -DCONFIG_INFINEON_SECURE_POLICY=\"policy/policy_secure.json\"
Using MCUboot
CYW20829 devices are supported by the Cypress MCU bootloader (MCUBootApp) from the Cypress branch of MCUboot.
Building Cypress MCU Bootloader MCUBootApp
Please refer to the CYW20829 platform description and follow the
instructions to understand the MCUBootApp building process for normal/secure
silicon and its overall usage as a bootloader. Place keys and policy-related
folders in the cypress directory mcuboot/boot/cypress/.
Ensure the default memory map matches the memory map of the Zephyr application (refer to partitions of flash0 in boards/infineon/cyw920829m2evk_02/cyw920829m2evk_02-memory_map.dtsi).
You can use west flash to flash MCUBootApp:
# Flash MCUBootApp.hex
west flash --no-rebuild --hex-file /path/to/cypress/mcuboot/boot/cypress/MCUBootApp/out/CYW20829/Debug/MCUBootApp.hex
Note
west flash requires an existing Zephyr build directory which can be
created by first building any Zephyr application for the target board.
Build Zephyr Application with MCUboot
Here is an example for building and flashing the Blinky sample application for MCUboot:
# From the root of the zephyr repository
west build -b cyw920829m2evk_02/cyw20829b0lkml -p always samples/basic/blinky -- -DCONFIG_BOOTLOADER_MCUBOOT=y -DCONFIG_MCUBOOT_SIGNATURE_KEY_FILE=\"/path/to/cypress/mcuboot/boot/cypress/keys/cypress-test-ec-p256.pem\"
west flash
If you use CONFIG_MCUBOOT_ENCRYPTION_KEY_FILE to generate an
encrypted image then the final hex will be zephyr.signed.encrypted.hex and
the corresponding bin file will be zephyr.signed.encrypted.bin. Use these
files for flashing and OTA uploading respectively.
For example, to build and flash an encrypted Blinky sample application image for MCUboot:
# From the root of the zephyr repository
west build -b cyw920829m2evk_02/cyw20829b0lkml -p always samples/basic/blinky -- -DCONFIG_BOOTLOADER_MCUBOOT=y -DCONFIG_MCUBOOT_SIGNATURE_KEY_FILE=\"/path/to/cypress/mcuboot/boot/cypress/keys/cypress-test-ec-p256.pem\" -DCONFIG_MCUBOOT_ENCRYPTION_KEY_FILE=\"/path/to/cypress/mcuboot/enc-ec256-pub.pem\"
west flash --hex-file build/zephyr/zephyr.signed.encrypted.hex