NPCX7M6FB_EVB
Overview
The NPCX7M6FB_EVB kit is a development platform to evaluate the Nuvoton NPCX7 series microcontrollers. This board needs to be mated with part number NPCX796FB.
Hardware
ARM Cortex-M4F Processor
256 KB RAM and 64 KB boot ROM
ADC & GPIO headers
UART0 and UART1
FAN PWM interface
Jtag interface
Intel Modular Embedded Controller Card (MECC) headers
Supported Features
The npcx7m6fb_evb
board supports the hardware features listed below.
- on-chip / on-board
- Feature integrated in the SoC / present on the board.
- 2 / 2
-
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files. -
vnd,foo
-
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.
npcx7m6fb_evb/npcx7m6fb
target
Type |
Location |
Description |
Compatible |
---|---|---|---|
CPU |
on-chip |
ARM Cortex-M4F CPU1 |
|
ADC |
on-chip |
Nuvoton, NPCX-ADC node1 |
|
Clock control |
on-chip |
Nuvoton, NPCX PCC (Power and Clock Controller) node1 |
|
ESPI |
on-chip |
Nuvoton NPCX eSPI Virtual Wire (VW) mapping child node1 |
|
on-chip |
Nuvoton, NPCX-eSPI node1 |
||
on-chip |
Nuvoton, NPCX-Host Sub-Modules node1 |
||
on-chip |
Nuvoton, NPCX-Host UART IO node1 |
||
Flash controller |
on-chip |
Properties defining the NPCX Quad-SPI peripheral of Flash Interface Unit (FIU)1 |
|
on-chip |
The SPI NOR flash devices accessed by Nuvoton Flash Interface Unit (FIU)1 |
||
GPIO & Headers |
on-chip |
Nuvoton, NPCX-GPIO16 |
|
I2C |
on-chip |
||
on-chip |
|||
Input |
on-chip |
Nuvoton NPCX keyboard scan controller1 |
|
Interrupt controller |
on-chip |
NPCX-MIWU Wake-Up Unit Input (WUI) mapping child node1 |
|
on-chip |
|||
on-chip |
NPCX-MIWU group-interrupt mapping child node3 |
||
on-chip |
ARMv7-M NVIC (Nested Vectored Interrupt Controller)1 |
||
LED |
on-board |
Group of PWM-controlled LEDs1 |
|
Memory controller |
on-chip |
Nuvoton, NPCX Battery Backed RAM node1 |
|
Miscellaneous |
on-chip |
Nuvoton, NPCX soc ID1 |
|
on-chip |
Nuvoton, NPCX booter variant options1 |
||
PECI |
on-chip |
Nuvoton NPCX PECI node1 |
|
Pin control |
on-chip |
Nuvoton NPCX7 Pin-Mux Configuration Configuration map from Nuvoton NPCX GPIO to pinmux controller (SCFG) driver instances1 |
|
on-chip |
Nuvoton NPCX7 Low-Voltage level detection configuration map between Nuvoton NPCX GPIO and low-voltage controller (LV_GPIO_CTL) driver instances1 |
||
on-chip |
Nuvoton NPCX System Configuration (Pinmux, 1.8V support and so on)1 |
||
on-chip |
Nuvoton, NPCX Default Pins Configurations1 |
||
on-chip |
The Nuvoton pin controller is a singleton node responsible for controlling pin function selection and pin properties1 |
||
on-chip |
Nuvoton, NPCX power leakage IOs1 |
||
Power management |
on-chip |
Nuvoton, NPCX Power Switch Logic (PSL) control node1 |
|
PS/2 |
on-chip |
Nuvoton, NPCX-PS/2 controller node1 |
|
on-chip |
Nuvoton, NPCX-PS/2 channel pads node4 |
||
PWM |
on-chip |
||
Reset controller |
on-chip |
NPCX Reset Controller1 |
|
Serial controller |
on-chip |
||
SHI |
on-chip |
Nuvoton, NPCX Serial Host Interface (SHI) node1 |
|
SPI |
on-chip |
Nuvoton, NPCX SPI controller1 |
|
SRAM |
on-chip |
Generic on-chip SRAM description2 |
|
System controller |
on-chip |
System Controller Registers R/W2 |
|
Tachometer |
on-chip |
||
Timer |
on-chip |
ARMv7-M System Tick1 |
|
on-chip |
Nuvoton, NPCX Internal Timer (ITIM) node1 |
||
Watchdog |
on-chip |
Nuvoton, NPCX-TWD node1 |
Connections and IOs
Nuvoton to provide the schematic for this board.
System Clock
The NPCX7M6FB MCU is configured to use the 90Mhz internal oscillator with the on-chip PLL to generate a resulting EC clock rate of 15 MHz. See Processor clock control register (chapter 4 in user manual)
Serial Port
UART1 is configured for serial logs.
Programming and Debugging
This board comes with a Cortex ETM port which facilitates tracing and debugging using a single physical connection. In addition, it comes with sockets for JTAG only sessions.
Flashing
If the correct IDC headers are installed, this board supports both J-TAG and also the ChromiumOS servo.
To flash using Servo V2, μServo, or Servo V4 (CCD), see the Chromium EC Flashing Documentation [1] for more information.
To flash with J-TAG, install the drivers for your programmer, for example: SEGGER J-link’s drivers are at https://www.segger.com/downloads/jlink/
# From the root of the zephyr repository
west build -b npcx7m6fb_evb samples/hello_world
west flash
Debugging
Use JTAG/SWD with a J-Link