QCC744M Evaluation Kit

Board Overview

QCC744M Evaluation Kit

Name:

qcc744m_evk

Vendor:

Qualcomm Technologies, Inc

Status:

Not actively maintained

Architecture:

riscv

SoC:

bl618m05q2i

Browse board sources

Overview

The QCC744M Evaluation board features the QCC744M module, which contains a QCC744-2 SoC with 4MB of PSRAM and an external 8MB Flash chip. Qualcomm QCC74x is a tri-radio chipset integrating 1x1 Wi-Fi 6, Bluetooth 5.4, and IEEE 802.15.4 (Thread and Zigbee-ready) powered by a 32-bit RISC-V MCU up to 320 MHz, it is based on, and mostly equivalent, to the Bouffalolab BL61x Serie of chipsets.

Hardware

For more information about the Qualcomm QCC74x MCU:

• Qualcomm QCC74x MCU Datasheet

• Qualcomm QCC74x MCU Programming Manual

• Qualcomm QCC744M EVK Quick Start Guide

• Qualcomm QCC74x SDK

• qcc744m_evk Schematics

Supported Features

The qcc744m_evk board supports the hardware features listed below.

on-chip / on-board

Feature integrated in the SoC / present on the board.

2 / 2

Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.

vnd,foo

Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

qcc744m_evk/bl618m05q2i target

Type	Location	Description	Compatible
CPU	on-chip	Xuantie E907 Core CPU1	xuantie,e907
ADC	on-chip	Bouffalolab ADC1	bflb,adc
Clock control	on-chip	Generic fixed-rate clock provider2	fixed-clock
	on-chip	The BL61x WIFI PLL1	bflb,bl61x-wifipll
	on-chip	The BL61x Audio PLL1	bflb,bl61x-aupll
	on-chip	The BL61x Root Clock Represents both FCLK and HCLK, which should be kept the same1	bflb,bl61x-root-clk
	on-chip	The BCLK clock, or peripheral clock Source Clock -> Root Clock -> / divider -> BCLK1	bflb,bclk
	on-chip	The BL61x Flash Clock Source -> divider -> CLK Only has settings for Bank 1 (boot flash) at the moment1	bflb,bl61x-flash-clk
	on-chip	Bouffalolab BL61x Clock Controller1	bflb,bl61x-clock-controller
DMA	on-chip	Bouffalo Lab DMA1	bflb,dma
Flash controller	on-chip	Bouffalolab Flash Controller1	bflb,flash-controller
GPIO & Headers	on-chip	BouffaloLab GPIO node for BL61X serie1	bflb,bl61x-gpio
I2C	on-chip	Bouffalolab I2C interface11	bflb,i2c
Input	on-chip	Bouffalolab Infrared Receiver Peripheral Wire the output of a diode like VS1838B to the specified GPIO pin1	bflb,irx
	on-board	Group of GPIO-bound input keys1	gpio-keys
Interrupt controller	on-chip	Nuclei ECLIC interrupt controller1	nuclei,eclic
Memory controller	on-chip	BL61x pseudo-static RAM controller1	bflb,bl61x-psram
MIPI-DBI	on-chip	BFLB MIPI DBI controller When used with devices that dont match MIPI DBI properly (eg commands are fully with DC set, not DC then data, for example SSD1327), you MUST use cs-gpios and dc-gpio to allow holding the lines for command via software and not use hardware DC and CS1	bflb,dbi
MTD	on-board	Flash node1	soc-nv-flash
	on-board	Fixed partitions of a flash (or other non-volatile storage) memory1	fixed-partitions
Pin control	on-chip	Bouffalo Lab Pinctrl node1	bflb,pinctrl
Power management	on-chip	Bouffalolab Power Controller1	bflb,power-controller
PWM	on-chip	Bouffalolab PWM 21	bflb,pwm-2
Regulator	on-chip	Bouffalolab HBN SoC (CPU, Memory, etc) voltage regulator It is a LDO with a canonical voltage of 1.10v It has two modes, but they are only switched between when going into sleep mode and do not share settings areas1	bflb,soc-regulator
	on-chip	Bouffalolab HBN RT (RTC) voltage regulator It is a LDO with a canonical voltage of 1.10v It has two modes, but they are only switched between when going into sleep mode and do not share settings areas1	bflb,rt-regulator
	on-chip	Bouffalolab HBN AON (Always ON section) voltage regulator It is a LDO with a canonical voltage of 1.10v It has two modes, but they are only switched between when going into sleep mode and do not share settings areas1	bflb,aon-regulator
Serial controller	on-chip	Bouffalo Lab UART11	bflb,uart
SPI	on-chip	Bouffalolab SPI1	bflb,spi
SRAM	on-chip	Generic on-chip SRAM2	mmio-sram
System controller	on-chip	BouffaloLab Efuse1	bflb,efuse
Timer	on-chip	RISC-V Machine Timer1	riscv,machine-timer
Watchdog	on-chip	Bouffalo Lab Watchdog Timer1	bflb,wdt

Serial Port

The qcc744m_evk board uses UART0 as default serial port. It is connected to the onboard USB Serial converter and the port is used for both program and console.

Programming and Debugging

Samples

1. Build the Zephyr kernel and the Hello World sample application:

   # From the root of the zephyr repository
   west build -b qcc744m_evk samples/hello_world
   

2. west flash cannot flash QCC74x MCUs at the moment. You may first acquire ‘QConn Flash’ from the Qualcomm QCC74x SDK and follow these instructions:

   • Open Qconn Flash

   • Go to tab ‘Flash Utils’

   • Select appropriate flash port and interface.

   • Reset board (press RESET, right button) while holding the BOOT (left) button to enter flash mode

   • In ‘Flash Program’, browse to bsp/board/qcc744dk/config/boot2_qcc743_isp_release_v8.1.9.bin from the SDK and set the address to 0x0

   • Press the ‘Download’ Button

   • Enter Flash mode again

   • In ‘Flash Program’, browse to zephyr.bin from your build folder and set the address to 0x2000

   • Press the ‘Download’ Button again.

   Your board is now flashed. Once the first binary has been flashed at 0x0, there is no need to re-flash it unless the flash area containing it is erased.

3. Run your favorite terminal program to listen for output. Under Linux the terminal should be /dev/ttyACM1. For example:

   $ screen /dev/ttyACM1 115200
   

   Connection should be configured as follows:

   • Speed: 115200

   • Data: 8 bits

   • Parity: None

   • Stop bits: 1

   Then, press and release RESET button

   *** Booting Zephyr OS build v4.3.0 ***
   Hello World! qcc744m_evk/bl618m05q2i
   

Congratulations, you have qcc744m_evk configured and running Zephyr.