ARIES v3.0 Development Board

Overview

The C-DAC ARIES v3.0 is a development board built around the THEJAS32 [1] System-on-Chip from the Centre for Development of Advanced Computing (C-DAC). THEJAS32 is based on the VEGA ET1031, a 32-bit (RV32IM) single-core, in-order, 3-stage pipeline RISC-V processor developed under India’s Digital India RISC-V (DIR-V) programme.

Hardware

VEGA ET1031 (RV32IM) core running at up to 100 MHz
256 KB internal SRAM (250 KB available to applications, the boot ROM reserves the top 6 KB)
2 MB external SPI flash
3x UART, 4x SPI, 3x I2C, 8x PWM, 32x GPIO, ADC
On-board RGB LED
JTAG debug interface

Supported Features

The aries_v3 board supports the hardware features listed below.

on-chip / on-board: Feature integrated in the SoC / present on the board.
2 / 2: Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.
vnd,foo: Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

`aries_v3/thejas32` target

On-target memory for this board target: 250 KiB of RAM, N/A of Flash.

Type	Location	Description	Compatible
CPU	on-chip	Generic RISC-V CPU1	`riscv`
GPIO & Headers	on-chip	C-DAC THEJAS32 GPIO controller2	`cdac,thejas32-gpio`
Interrupt controller	on-chip	RISC-V CPU interrupt controller1	`riscv,cpu-intc`
Interrupt controller	on-chip	C-DAC THEJAS32 interrupt controller1	`cdac,thejas32-intc`
LED	on-board	Group of GPIO-controlled LEDs1	`gpio-leds`
Serial controller	on-chip	ns16550 UART1 2	`ns16550`
SRAM	on-chip	Generic on-chip SRAM1	`mmio-sram`
Timer	on-chip	RISC-V Machine Timer1	`riscv,machine-timer`

SPI, I2C, PWM and ADC are present on the SoC but not yet supported in Zephyr.

Connections and IOs

The Zephyr console runs on uart0 at 115200 baud, which is wired to the board’s USB-C connector through a USB-UART bridge.

The three dies of the on-board RGB LED are driven, active low, by GPIO22 (green, led0), GPIO23 (blue, led1) and GPIO24 (red, led2).

Programming and Debugging

The aries_v3 board supports the runners and associated west commands listed below.

	flash	debug
vegadude	✅ (default)

Flashing

The board is flashed over the same USB-C serial port used for the console: the boot ROM receives a raw binary over UART using the XMODEM protocol and executes it from SRAM. west flash uses the open-source vegadude [2] utility, which must be available on the PATH.

To put the board in UART boot mode, leave the BOOT SEL jumper open and press the reset button, then build and flash an application. Here is an example for Hello World.

# From the root of the zephyr repository
west build -b aries_v3 samples/hello_world
west flash

Then attach a serial terminal to see the console output:

$ picocom /dev/ttyUSB0 -b 115200

C-DAC’s vegaxmodem (UART boot) and vegaflasher (SPI flash boot) tools can also be used to upload zephyr.bin manually.