GD32VF103C-STARTER
Overview
The GD32VF103C-STARTER board is a hardware platform that enables prototyping on GD32VF103CB RISC-V MCU.
The GD32VF103CB features a single-core RISC-V 32-bit MCU which can run up to 108 MHz with flash accesses zero wait states, 128 KiB of Flash, 32 KiB of SRAM and 37 GPIOs.
Hardware
GD32VF103CBT6 MCU
1 x User LEDs
1 x USART (USB port with CH340E)
USB FS connector
GD-Link on board programmer
J-Link/JTAG connector
For more information about the GD32VF103 SoC and GD32VF103C-STARTER board:
Supported Features
The gd32vf103c_starter
board supports the hardware features listed below.
- on-chip / on-board
- Feature integrated in the SoC / present on the board.
- 2 / 2
-
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files. -
vnd,foo
-
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.
Type |
Location |
Description |
Compatible |
---|---|---|---|
CPU |
on-chip |
Nuclei Bumblebee RISC-V Core1 |
|
ADC |
on-chip |
GigaDevice GD32 ADC2 |
|
Clock control |
on-chip |
Gigadevice Reset and Clock Unit (RCU) if a multi-function peripheral in charge of reset control (RCTL) and clock control (CCTL) for all SoC peripherals1 |
|
Counter |
on-chip |
||
DAC |
on-chip |
GigaDevice GD32 series DAC module1 |
|
DMA |
on-chip |
GD32 DMA controller2 |
|
Flash controller |
on-chip |
There are three types GD32 FMC1 |
|
GPIO & Headers |
on-chip |
||
I2C |
on-chip |
GigiDevice GD32 I2C1 |
|
Input |
on-board |
Group of GPIO-bound input keys1 |
|
Interrupt controller |
on-chip |
Nuclei ECLIC interrupt controller1 |
|
on-chip |
GigaDevice External Interrupt Controller1 |
||
LED |
on-board |
Group of GPIO-controlled LEDs1 |
|
on-board |
Group of PWM-controlled LEDs1 |
||
Multi-Function Device |
on-chip |
Gigadevice Reset and Clock Unit (RCU) if a multi-function peripheral in charge of reset control (RCTL) and clock control (CCTL) for all SoC peripherals1 |
|
MTD |
on-chip |
Flash memory binding of GD32 FMC v11 |
|
Pin control |
on-chip |
The AFIO peripheral is used to configure pin remapping, EXTI sources and, when available, enable the I/O compensation cell1 |
|
on-chip |
The GD32 pin controller (AFIO model) is a singleton node responsible for controlling pin function selection and pin properties1 |
||
PWM |
on-chip |
||
Reset controller |
on-chip |
Gigadevice Reset and Clock Unit (RCU) if a multi-function peripheral in charge of reset control (RCTL) and clock control (CCTL) for all SoC peripherals1 |
|
Serial controller |
on-chip |
||
SPI |
on-chip |
GigaDevice GD32 SPI2 |
|
SRAM |
on-chip |
Generic on-chip SRAM description1 |
|
Timer |
on-chip |
Nuclei System Timer1 |
|
Watchdog |
on-chip |
GD32 free watchdog timer1 |
|
on-chip |
GD32 window watchdog timer1 |
Serial Port
The GD32VF103C-STARTER board has one serial communications port. TX connected at PA9 and RX at PA10.
Programming and Debugging
Before programming your board make sure to configure boot and serial jumpers as follows:
JP2/3: Select 2-3 for both (boot from user memory)
JP5/6: Select 1-2 positions (labeled as
USART0
)
Using GD-Link
The GD32VF103C-STARTER includes an onboard programmer/debugger (GD-Link) which allows flash programming and debugging over USB. There is also a JTAG header (JP1) which can be used with tools like Segger J-Link.
Build the Zephyr kernel and the Hello World sample application:
west build -b gd32vf103c_starter samples/hello_world
Run your favorite terminal program to listen for output. On Linux the terminal should be something like
/dev/ttyUSB0
. For example:minicom -D /dev/ttyUSB0 -o
The -o option tells minicom not to send the modem initialization string. Connection should be configured as follows:
Speed: 115200
Data: 8 bits
Parity: None
Stop bits: 1
To flash an image:
west build -b gd32vf103c_starter samples/hello_world west flash
You should see “Hello World! gd32vf103c_starter” in your terminal.
To debug an image:
west build -b gd32vf103c_starter samples/hello_world west debug