IP Switch Board

Overview

The Segger IP Switch Board is a Evaluation board based on NXP Kinetis K66 MCU. It comes with Micrel/Microchip KSZ8794CNX integrated 4-port 10/100 managed Ethernet switch with Gigabit RGMII/MII/RMII interface.

KSZ8794CNX enables evaluation for switch functions
On-board debug probe J-Link-OB for programming

Hardware

MK66FN2M0VMD18 MCU (180 MHz, 2 MB flash memory, 256 KB RAM, low-power, crystal-less USB
Dual role USB interface with micro-B USB connector
2 User LED
On-board debug probe J-Link-OB for programming
Micrel/Microchip Ethernet Switch KSZ8794CNX with 3 RJ45 connectors

For more information about the K66F SoC and IP-K66F board:

Supported Features

The ip_k66f board supports the hardware features listed below.

on-chip / on-board: Feature integrated in the SoC / present on the board.
2 / 2: Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.
vnd,foo: Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

`ip_k66f/mk66f18` target

Type	Location	Description	Compatible
CPU	on-chip	ARM Cortex-M4F CPU1	`arm,cortex-m4f`
ADC	on-chip	Kinetis ADC162	`nxp,kinetis-adc16`
CAN	on-chip	NXP FlexCAN controller2	`nxp,flexcan`
Clock control	on-chip	NXP Kinetis Multipurpose Clock generator (MCG) IP node1	`nxp,kinetis-mcg`
	on-chip	Kinetis System Integration Module (SIM) IP node1	`nxp,kinetis-sim`
	on-chip	Generic fixed factor clock provider4	`fixed-factor-clock`
Counter	on-chip	NXP Periodic Interrupt Timer (PIT)1	`nxp,pit`
Counter	on-chip	Child node for the Periodic Interrupt Timer node, intended for an individual timer channel4	`nxp,pit-channel`
DAC	on-chip	NXP Kinetis MCUX DAC2	`nxp,kinetis-dac`
DMA	on-chip	NXP MCUX EDMA controller1	`nxp,mcux-edma`
DSA	on-board	KSZ8794 ethernet switch with SPI interface1	`microchip,ksz8794`
Ethernet	on-chip	NXP ENET IP Module1	`nxp,enet`
	on-chip	NXP ENET MAC/L2 Device1	`nxp,enet-mac`
	on-board	Generic MII PHY1	`ethernet-phy`
	on-chip	NXP ENET PTP (Precision Time Protocol) Clock1	`nxp,enet-ptp-clock`
Flash controller	on-chip	NXP Kinetis Flash Memory Module E (FTFE)1	`nxp,kinetis-ftfe`
GPIO & Headers	on-chip	Kinetis GPIO3 2	`nxp,kinetis-gpio`
I2C	on-chip	Kinetis I2C3	`nxp,kinetis-i2c`
Interrupt controller	on-chip	ARMv7-M NVIC (Nested Vectored Interrupt Controller)1	`arm,v7m-nvic`
LED	on-board	Group of GPIO-controlled LEDs1	`gpio-leds`
MDIO	on-chip	NXP ENET MDIO Features1	`nxp,enet-mdio`
MTD	on-chip	Flash node1	`soc-nv-flash`
MTD	on-board	Fixed partitions of a flash (or other non-volatile storage) memory1	`fixed-partitions`
Pin control	on-chip	NXP PORT Pin Controller5	`nxp,port-pinmux`
Pin control	on-chip	NXP PORT Pin Controller1	`nxp,port-pinctrl`
RNG	on-chip	Kinetis RNGA (Random Number Generator Accelerator)1	`nxp,kinetis-rnga`
RTC	on-chip	NXP Real Time Clock (RTC)1	`nxp,rtc`
Sensors	on-chip	NXP Kinetis temperature sensor2	`nxp,kinetis-temperature`
Serial controller	on-chip	Kinetis UART6	`nxp,kinetis-uart`
Serial controller	on-chip	NXP LPUART1	`nxp,lpuart`
SPI	on-chip	NXP DSPI controller1 2	`nxp,dspi`
SRAM	on-chip	Generic on-chip SRAM description1	`mmio-sram`
Timer	on-chip	ARMv7-M System Tick1	`arm,armv7m-systick`
Timer	on-chip	NXP FlexTimer Module (FTM)4	`nxp,ftm`
USB	on-chip	NPX Kinetis USBFSOTG Controller in device mode1	`nxp,kinetis-usbd`
Watchdog	on-chip	Kinetis watchdog1	`nxp,kinetis-wdog`

Micrel/Microchip KSZ8794CNX Ethernet Switch is supported (see DSA (Distributed Switch Architecture) sample).

Connections and IOs

The K66F SoC has five pairs of pinmux/gpio controllers.

Name	Function	Usage
PTA8	GPIO	Red LED
PTA10	GPIO	RED LED

System Clock

The K66F SoC is configured to use the 12 MHz low gain crystal oscillator on the board with the on-chip PLL to generate a 180 MHz system clock.

Serial Port

The K66F SoC has six UARTs. None of them are used.

Programming and Debugging

Build and flash applications as usual (see Building an Application and Run an Application for more details).

Configuring a Debug Probe

A debug probe is used for both flashing and debugging the board. This board is configured by default to use the OpenSDA J-Link Onboard Debug Probe.

OpenSDA J-Link Onboard Debug Probe 

Install the J-Link Debug Host Tools and make sure they are in your search path.

Follow the instructions in OpenSDA J-Link Onboard Debug Probe to program the OpenSDA J-Link Generic Firmware for V3.2 Bootloader. Note that Segger does provide an OpenSDA J-Link Board-Specific Firmware for this board, however it is not compatible with the DAPLink bootloader.

The default flasher is jlink using the built-in SEGGER Jlink interface.

Flashing

Here is an example for the Blinky application.

# From the root of the zephyr repository
west build -b ip_k66f samples/basic/blinky
west flash

Red LED0 should blink at 1 second delay.

Debugging

Here is an example for the Blinky application.

# From the root of the zephyr repository
west build -b ip_k66f samples/basic/blinky
west debug

Step through the application in your debugger.

Serial console

The ip_k66f board only uses Segger’s RTT console for providing serial console. There is no physical serial port available.

To communicate with this board one needs in one console:

/opt/SEGGER/JLink_V664/JLinkRTTLogger -Device MK66FN2M0XXX18 -RTTChannel 1 -if SWD -Speed 4000 ~/rtt.log

In another one:

nc localhost 19021