MSPM33C321A Launchpad

Overview

The MSPM33C321A is part of the TI MSP highly integrated, ultra-low-power 32-bit MCU family based on the Arm® Cortex®-M33 32-bit core platform operating at up to 160 MHz. These MCUs offer high-performance analog peripheral integration, support extended temperature ranges from -40 °C to 125 °C, and operate with supply voltages from 1.62 V to 3.6 V.

The MSPM33C321A provides 1 MB embedded flash program memory with built-in error correction code (ECC) and 256 KB SRAM with hardware parity option. These MCUs also incorporate a memory protection unit, DMA, and a variety of peripherals including:

  • Analog.

    • One 12-bit high-speed SAR ADC (HSADC) with 4 sequencers and up to 32 input channels, oversampling (up to 8x), and internal voltage reference (1.4 V, 2.5 V).

  • Digital.

    • Multiple timer groups (TIMG) with alarm and capture/compare support.

    • Up to 3 GPIO ports (GPIOA, GPIOB, GPIOC) with interrupt support.

    • DMA controller with up to 16 channels.

  • Communication.

    • UNICOMM (Universal Communication) peripherals supporting UART, SPI, and I2C modes, configurable per instance.

See the MSPM33C321A Datasheet [2] and MSPM33C321A TRM [3] for full device specifications.

Hardware

The LP-MSPM33C321A LaunchPad is a low-cost development board for the MSPM33C321A MCU.

Board features:

  • MSPM33C321A MCU (Arm Cortex-M33 @ 160 MHz, 1 MB flash, 256 KB SRAM)

  • On-board XDS110 debug probe with SWD interface

  • Three user LEDs (red, green, blue) and two push buttons

  • Multiple expansion headers for BoosterPack ecosystem compatibility

  • On-board 32.768 kHz crystal for LFCLK

Details on the LP-MSPM33C321A LaunchPad can be found on the TI LP-MSPM33C321A Product Page [1].

Supported Features

The lp_mspm33c321a board supports the hardware features listed below.

on-chip / on-board
Feature integrated in the SoC / present on the board.
2 / 2
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.
vnd,foo
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

lp_mspm33c321a/mspm33c321a target

On-target memory for this board target: 256 KiB of RAM, 1 MiB of Flash.

Type

Location

Description

Compatible

CPU

on-chip

ARM Cortex-M33 CPU1

arm,cortex-m33

Interrupt controller

on-chip

ARMv8-M NVIC (Nested Vectored Interrupt Controller)1

arm,v8m-nvic

MTD

on-chip

Flash node1

soc-nv-flash

SRAM

on-chip

Generic on-chip SRAM1

mmio-sram

Timer

on-chip

ARMv8-M System Tick1

arm,armv8m-systick

Connections and IOs

LEDs

  • LED0 (red) = PC26

  • LED1 (green) = PC27

  • LED2 (blue) = PA2

Push Buttons

  • S1 = reset

  • S2 (user) = PB21

Serial Port

The Zephyr console is assigned to UNICOMM12 UART (TX=PA10, RX=PA11). Default settings: 115200 8N1, no flow control. Accessible via the XDS110 debugger’s virtual COM port over USB.

System Clock

The MSPM33C321A clock tree is driven by SYSOSC (32 MHz) through the system PLL:

  • SYSOSC (32 MHz) → SYSPLL → HSCLK → MCLK (160 MHz, CPU clock)

  • ULPCLK: 40 MHz ultra-low-power clock for peripherals

  • LFCLK: 32.768 kHz low-frequency clock (from on-board crystal)

Programming and Debugging

The lp_mspm33c321a board supports the runners and associated west commands listed below.

flash debug attach rtt debugserver
openocd ✅ (default) ✅ (default) ✅ ✅ ✅

Note

OpenOCD support for MSPM33 is not yet upstream in the OpenOCD project. A custom TI OpenOCD fork must be built before using west flash or west debug with this board. See Building a patched OpenOCD below.

Building

Follow the Getting Started Guide instructions for Zephyr application development.

# From the root of the zephyr repository
west build -b lp_mspm33c321a samples/basic/blinky

Flashing

Once the custom OpenOCD is built, flash using:

$ west flash --openocd <path-to-openocd>/src/openocd \
      --openocd-search <path-to-openocd>/tcl

After flashing, a reset is required to start the application. Either press the nRST button on the board, or run:

$ <path-to-openocd>/src/openocd -s <path-to-openocd>/tcl \
      -f board/ti_mspm33_launchpad.cfg \
      -c "init; mspm33_board_reset; shutdown"

When multiple boards are connected, identify each board’s XDS110 serial number and pass it to the adapter:

$ lsusb -v -d 0451:bef3 | grep iSerial
$ west flash --openocd <path-to-openocd>/src/openocd \
      --openocd-search <path-to-openocd>/tcl \
      --cmd-pre-init "adapter serial <serial_number>"

Debugging

# From the root of the zephyr repository
west build -b lp_mspm33c321a samples/basic/blinky
west debug

Pass the same --openocd and --openocd-search arguments as for flashing.

Building a patched OpenOCD

MSPM33 OpenOCD support is provided via a TI fork of OpenOCD. Build it as follows:

  1. Install prerequisites (Ubuntu):

    $ sudo apt install autoconf automake libtool pkg-config \
      libusb-1.0-0-dev libhidapi-dev

  2. Clone and build:

    $ git clone -b ti-release https://github.com/TexasInstruments/ti-openocd
$ cd ti-openocd
$ git submodule update --init --recursive
$ ./bootstrap
$ ./configure --enable-xds110
$ make

Pre-built binaries for Linux and Windows are available from the TI OpenOCD ti-v1.2.0 release page [4].

Recovery

The TI OpenOCD build provides device recovery commands:

Factory reset (recover a locked or bricked board):

$ <path-to-openocd>/src/openocd -s <path-to-openocd>/tcl \
      -f board/ti_mspm33_launchpad.cfg \
      -c "init; mspm33_factory_reset; shutdown"

Mass erase (erase all flash):

$ <path-to-openocd>/src/openocd -s <path-to-openocd>/tcl \
      -f board/ti_mspm33_launchpad.cfg \
      -c "init; mspm33_mass_erase; shutdown"

References