WCH CH32V305F-EVT-R0

Overview

The WCH [1] CH32V305F-EVT-R0 is an evaluation board for the RISC-V based CH32V305FBP6 SOC.

The board is equipped with a power LED, reset button, USB port for power/data, and two user LEDs.

Hardware

The QingKe V4F 32-bit RISC-V processor of the WCH CH32V305F-EVT-R0 is clocked by an external crystal and runs at 144 MHz.

The WCH webpage on CH32V30x [2] contains the processor’s information and the datasheet. WCH CH32V305F-EVT-R0 board schematics can be found on CH32V307 openwch git repository [6]. Note that the documentation for the CH32V305 is located under the CH32V307 pages.

Warning

Most WCH dev kits do not come with the USB CC line pull-downs fitted. To power the board from a USB C adapter you need to fit them. However there is no USB VBUS diode on the board so be careful not to power a device from USB and external supply simultaneously!

Supported Features

The ch32v305f_evt_r0 board supports the hardware features listed below.

on-chip / on-board
Feature integrated in the SoC / present on the board.
2 / 2
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.
vnd,foo
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

ch32v305f_evt_r0/ch32v305 target

On-target memory for this board target: 32 KiB of RAM, 128 KiB of Flash.

Type

Location

Description

Compatible

CPU

on-chip

WCH QingKe V4F RISC-V MCU1

wch,qingke-v4f

Clock control

on-chip

WCH CH32V00x Reset and Clock Control (RCC)1

wch,rcc

on-chip

WCH CH32V00x HSE Clock1

wch,ch32v00x-hse-clock

on-chip

WCH CH32V00x HSI Clock1

wch,ch32v00x-hsi-clock

on-chip

Generic fixed-rate clock provider1

fixed-clock

on-chip

WCH CH32V20x/30x PLL1

wch,ch32v20x_30x-pll-clock

DMA

on-chip

WCH DMA controller2

wch,wch-dma

GPIO & Headers

on-chip

WCH CH32V00x General-Purpose Input/Output (GPIO)5

wch,gpio

I2C

on-chip

WCH I2C controller2

wch,i2c

Interrupt controller

on-chip

WCH CH32V00x Programmable Fast Interrupt Controller (PFIC)1

wch,pfic

on-chip

WCH CH32V003/20x/30x External Interrupt and Event Controller (EXTI)1

wch,exti

LED

on-board

Group of GPIO-controlled LEDs1

gpio-leds

MTD

on-chip

Flash node1

soc-nv-flash

Pin control

on-chip

WCH CH32V20x/30x AFIO1

wch,20x_30x-afio

RNG

on-chip

WCH CH32 RNG (Random Number Generator)1

wch,rng

Serial controller

on-chip

WCH CH32V00x UART14

wch,usart

SPI

on-chip

WCH SPI3

wch,spi

SRAM

on-chip

Generic on-chip SRAM1

mmio-sram

Timer

on-chip

WCH CH32V00x Systick1

wch,systick

Watchdog

on-chip

WCH Independent Watchdog (IWDG)1

wch,iwdg

Connections and IOs

LED

Board LEDs are not connected to SoC in layout. For blinky and threads sample applications you have to use jumper wires to connect them to I/O pins. You also need to change leds status to “okay” in boards/wch/ch32v305f_evt_r0/ch32v305f_evt_r0.dts.

LED connection

P4 header

P2 header

LED1

PB6

LED2

PB7

Programming and Debugging

The ch32v305f_evt_r0 board supports the runners and associated west commands listed below.

flash debug debugserver rtt attach
minichlink ✅ (default)
openocd ✅ (default)
wchisp
wlink

Applications for the ch32v305f_evt_r0 board can be built and flashed in the usual way (see Building an Application and Run an Application for more details).

Flashing

You can use minichlink [3] to flash the board. Once minichlink has been set up, build and flash applications as usual (see Building an Application and Run an Application for more details). wlink [4] is an alternative tool for using the WCH programmers. Alternatively, wchisp [5] can be used to flash via the USB bootloader.

Here is an example for the Blinky application.

# From the root of the zephyr repository
west build -b ch32v305f_evt_r0 samples/basic/blinky
west flash

Or you can use Basic thread manipulation sample to test both LEDs.

# From the root of the zephyr repository
west build -b ch32v305f_evt_r0 samples/basic/threads
west flash

Debugging

This board can be debugged via minichlink / openocd.

References