MuseLab nanoCH32V317
Overview
The MuseLab nanoCH32V317 is a development board for the RISC-V based CH32V317WCU6 SOC.
The board is equipped with a reset button, a boot button, one user LED, two USB ports and an Ethernet Jack.
Hardware
The QingKe V4F 32-bit RISC-V processor of the MuseLab nanoCH32V317 is clocked by an external crystal and runs at 144 MHz.
The chip’s most unique feature is an integrated Ethernet MAC and PHY that supports 100BASE-TX Ethernet.
The WCH webpage on CH32V31x [1] contains the processor’s information and the datasheet. MuseLab nanoCH32V317 board schematics can be found on nanoCH32V317 git repository [5].
Warning
There is no USB VBUS diode on the board so be careful not to power a device from USB and external supply simultaneously!
Supported Features
The nano_ch32v317 board supports the hardware features listed below.
- on-chip / on-board
- Feature integrated in the SoC / present on the board.
- 2 / 2
-
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files. -
vnd,foo -
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.
nano_ch32v317/ch32v317 target
On-target memory for this board target: 32 KiB of RAM, 480 KiB of Flash.
Type |
Location |
Description |
Compatible |
|---|---|---|---|
CPU |
on-chip |
WCH QingKe V4F RISC-V MCU1 |
|
Clock control |
on-chip |
WCH CH32V00x Reset and Clock Control (RCC)1 |
|
on-chip |
WCH CH32V00x HSE Clock1 |
||
on-chip |
WCH CH32V00x HSI Clock1 |
||
on-chip |
Generic fixed-rate clock provider1 |
||
on-chip |
WCH CH32V20x/30x PLL1 |
||
DMA |
on-chip |
WCH DMA controller2 |
|
Ethernet |
on-chip |
Contains the Ethernet MAC and the MDIO as child nodes1 |
|
on-chip |
Ethernet MAC Controller for WCH CH32 series MCUs1 |
||
on-chip |
WCH MDIO Controller1 |
||
on-board |
Generic MII PHY1 |
||
GPIO & Headers |
on-chip |
WCH CH32V00x General-Purpose Input/Output (GPIO)5 |
|
I2C |
on-chip |
WCH I2C controller2 |
|
Interrupt controller |
on-chip |
WCH CH32V00x Programmable Fast Interrupt Controller (PFIC)1 |
|
on-chip |
WCH CH32V003/20x/30x External Interrupt and Event Controller (EXTI)1 |
||
LED |
on-board |
Group of GPIO-controlled LEDs1 |
|
MTD |
on-chip |
Flash node1 |
|
Pin control |
on-chip |
WCH CH32V20x/30x AFIO1 |
|
RNG |
on-chip |
WCH CH32 RNG (Random Number Generator)1 |
|
Serial controller |
on-chip |
||
SPI |
on-chip |
WCH SPI3 |
|
SRAM |
on-chip |
Generic on-chip SRAM1 |
|
Timer |
on-chip |
WCH CH32V00x Systick1 |
|
Watchdog |
on-chip |
WCH Independent Watchdog (IWDG)1 |
nano_ch32v317/ch32v317/ram_128k target
On-target memory for this board target: 128 KiB of RAM, 480 KiB of Flash.
Type |
Location |
Description |
Compatible |
|---|---|---|---|
CPU |
on-chip |
WCH QingKe V4F RISC-V MCU1 |
|
Clock control |
on-chip |
WCH CH32V00x Reset and Clock Control (RCC)1 |
|
on-chip |
WCH CH32V00x HSE Clock1 |
||
on-chip |
WCH CH32V00x HSI Clock1 |
||
on-chip |
Generic fixed-rate clock provider1 |
||
on-chip |
WCH CH32V20x/30x PLL1 |
||
DMA |
on-chip |
WCH DMA controller2 |
|
Ethernet |
on-chip |
Contains the Ethernet MAC and the MDIO as child nodes1 |
|
on-chip |
Ethernet MAC Controller for WCH CH32 series MCUs1 |
||
on-chip |
WCH MDIO Controller1 |
||
on-board |
Generic MII PHY1 |
||
GPIO & Headers |
on-chip |
WCH CH32V00x General-Purpose Input/Output (GPIO)5 |
|
I2C |
on-chip |
WCH I2C controller2 |
|
Interrupt controller |
on-chip |
WCH CH32V00x Programmable Fast Interrupt Controller (PFIC)1 |
|
on-chip |
WCH CH32V003/20x/30x External Interrupt and Event Controller (EXTI)1 |
||
LED |
on-board |
Group of GPIO-controlled LEDs1 |
|
MTD |
on-chip |
Flash node1 |
|
Pin control |
on-chip |
WCH CH32V20x/30x AFIO1 |
|
RNG |
on-chip |
WCH CH32 RNG (Random Number Generator)1 |
|
Serial controller |
on-chip |
||
SPI |
on-chip |
WCH SPI3 |
|
SRAM |
on-chip |
Generic on-chip SRAM1 |
|
Timer |
on-chip |
WCH CH32V00x Systick1 |
|
Watchdog |
on-chip |
WCH Independent Watchdog (IWDG)1 |
nano_ch32v317/ch32v317/ram_192k target
On-target memory for this board target: 192 KiB of RAM, 480 KiB of Flash.
Type |
Location |
Description |
Compatible |
|---|---|---|---|
CPU |
on-chip |
WCH QingKe V4F RISC-V MCU1 |
|
Clock control |
on-chip |
WCH CH32V00x Reset and Clock Control (RCC)1 |
|
on-chip |
WCH CH32V00x HSE Clock1 |
||
on-chip |
WCH CH32V00x HSI Clock1 |
||
on-chip |
Generic fixed-rate clock provider1 |
||
on-chip |
WCH CH32V20x/30x PLL1 |
||
DMA |
on-chip |
WCH DMA controller2 |
|
Ethernet |
on-chip |
Contains the Ethernet MAC and the MDIO as child nodes1 |
|
on-chip |
Ethernet MAC Controller for WCH CH32 series MCUs1 |
||
on-chip |
WCH MDIO Controller1 |
||
on-board |
Generic MII PHY1 |
||
GPIO & Headers |
on-chip |
WCH CH32V00x General-Purpose Input/Output (GPIO)5 |
|
I2C |
on-chip |
WCH I2C controller2 |
|
Interrupt controller |
on-chip |
WCH CH32V00x Programmable Fast Interrupt Controller (PFIC)1 |
|
on-chip |
WCH CH32V003/20x/30x External Interrupt and Event Controller (EXTI)1 |
||
LED |
on-board |
Group of GPIO-controlled LEDs1 |
|
MTD |
on-chip |
Flash node1 |
|
Pin control |
on-chip |
WCH CH32V20x/30x AFIO1 |
|
RNG |
on-chip |
WCH CH32 RNG (Random Number Generator)1 |
|
Serial controller |
on-chip |
||
SPI |
on-chip |
WCH SPI3 |
|
SRAM |
on-chip |
Generic on-chip SRAM1 |
|
Timer |
on-chip |
WCH CH32V00x Systick1 |
|
Watchdog |
on-chip |
WCH Independent Watchdog (IWDG)1 |
nano_ch32v317/ch32v317/ram_64k target
On-target memory for this board target: 64 KiB of RAM, 480 KiB of Flash.
Type |
Location |
Description |
Compatible |
|---|---|---|---|
CPU |
on-chip |
WCH QingKe V4F RISC-V MCU1 |
|
Clock control |
on-chip |
WCH CH32V00x Reset and Clock Control (RCC)1 |
|
on-chip |
WCH CH32V00x HSE Clock1 |
||
on-chip |
WCH CH32V00x HSI Clock1 |
||
on-chip |
Generic fixed-rate clock provider1 |
||
on-chip |
WCH CH32V20x/30x PLL1 |
||
DMA |
on-chip |
WCH DMA controller2 |
|
Ethernet |
on-chip |
Contains the Ethernet MAC and the MDIO as child nodes1 |
|
on-chip |
Ethernet MAC Controller for WCH CH32 series MCUs1 |
||
on-chip |
WCH MDIO Controller1 |
||
on-board |
Generic MII PHY1 |
||
GPIO & Headers |
on-chip |
WCH CH32V00x General-Purpose Input/Output (GPIO)5 |
|
I2C |
on-chip |
WCH I2C controller2 |
|
Interrupt controller |
on-chip |
WCH CH32V00x Programmable Fast Interrupt Controller (PFIC)1 |
|
on-chip |
WCH CH32V003/20x/30x External Interrupt and Event Controller (EXTI)1 |
||
LED |
on-board |
Group of GPIO-controlled LEDs1 |
|
MTD |
on-chip |
Flash node1 |
|
Pin control |
on-chip |
WCH CH32V20x/30x AFIO1 |
|
RNG |
on-chip |
WCH CH32 RNG (Random Number Generator)1 |
|
Serial controller |
on-chip |
||
SPI |
on-chip |
WCH SPI3 |
|
SRAM |
on-chip |
Generic on-chip SRAM1 |
|
Timer |
on-chip |
WCH CH32V00x Systick1 |
|
Watchdog |
on-chip |
WCH Independent Watchdog (IWDG)1 |
nano_ch32v317/ch32v317/ram_96k target
On-target memory for this board target: 96 KiB of RAM, 480 KiB of Flash.
Type |
Location |
Description |
Compatible |
|---|---|---|---|
CPU |
on-chip |
WCH QingKe V4F RISC-V MCU1 |
|
Clock control |
on-chip |
WCH CH32V00x Reset and Clock Control (RCC)1 |
|
on-chip |
WCH CH32V00x HSE Clock1 |
||
on-chip |
WCH CH32V00x HSI Clock1 |
||
on-chip |
Generic fixed-rate clock provider1 |
||
on-chip |
WCH CH32V20x/30x PLL1 |
||
DMA |
on-chip |
WCH DMA controller2 |
|
Ethernet |
on-chip |
Contains the Ethernet MAC and the MDIO as child nodes1 |
|
on-chip |
Ethernet MAC Controller for WCH CH32 series MCUs1 |
||
on-chip |
WCH MDIO Controller1 |
||
on-board |
Generic MII PHY1 |
||
GPIO & Headers |
on-chip |
WCH CH32V00x General-Purpose Input/Output (GPIO)5 |
|
I2C |
on-chip |
WCH I2C controller2 |
|
Interrupt controller |
on-chip |
WCH CH32V00x Programmable Fast Interrupt Controller (PFIC)1 |
|
on-chip |
WCH CH32V003/20x/30x External Interrupt and Event Controller (EXTI)1 |
||
LED |
on-board |
Group of GPIO-controlled LEDs1 |
|
MTD |
on-chip |
Flash node1 |
|
Pin control |
on-chip |
WCH CH32V20x/30x AFIO1 |
|
RNG |
on-chip |
WCH CH32 RNG (Random Number Generator)1 |
|
Serial controller |
on-chip |
||
SPI |
on-chip |
WCH SPI3 |
|
SRAM |
on-chip |
Generic on-chip SRAM1 |
|
Timer |
on-chip |
WCH CH32V00x Systick1 |
|
Watchdog |
on-chip |
WCH Independent Watchdog (IWDG)1 |
Programming and Debugging
The nano_ch32v317 board supports the runners and associated west commands listed below.
| flash | debug | debugserver | rtt | attach | |
|---|---|---|---|---|---|
| minichlink | ✅ (default) | ||||
| openocd | ✅ | ✅ (default) | ✅ | ✅ | ✅ |
| wchisp | ✅ | ||||
| wlink | ✅ |
Applications for the nano_ch32v317 board can be built and flashed
in the usual way (see Building an Application and Run an Application
for more details).
Flashing
You can use minichlink [2] to flash the board. Once minichlink has been set
up, build and flash applications as usual (see Building an Application and
Run an Application for more details). wlink [3] is an alternative tool for using
the WCH programmers. Alternatively, wchisp [4] can be used to flash via the USB bootloader.
Here is an example for the Blinky application.
# From the root of the zephyr repository
west build -b nano_ch32v317 samples/basic/blinky
west flash
Or you can use DHCPv4 client sample to test evaluate the built-in Ethernet peripheral
# From the root of the zephyr repository
west build -b nano_ch32v317 samples/net/dhcpv4_client
west flash
Debugging
This board can be debugged via minichlink / openocd.