MKS CANable V1.0
Overview
The Makerbase MKS CANable V1.0 board features an ARM Cortex-M0 based STM32F072C8 MCU with a CAN, USB and debugger connections. Here are some highlights of the MKS CANable V1.0 board:
STM32 microcontroller in LQFP48 package
USB Micro-B connector (J1)
CAN-Bus connector (J3)
Three LEDs: blue/tx_led (D1), green/rx_led (D2), red/power_led (D3)
Power-on boot selection for BOOT0 (J5)
ST-LINK/V3E debugger/programmer header (J2)
Development support: Serial Wire Debug (SWD)
USB VBUS power supply (5 V)
The LED red/power_led (D3) is connected directly to on-board 3.3 V and not controllable by the MCU.
More information about the board can be found at the MKS CANable V1.0 website [1]. It is very advisable to take a look in on schematic MKS CANable V1.0 schematic [2] and user manual MKS CANable V2.0 User Manual [3] before start.
More information about STM32F072C8 can be found here:
Supported Features
The mks_canable_v10 board supports the hardware features listed below.
- on-chip / on-board
- Feature integrated in the SoC / present on the board.
- 2 / 2
-
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files. -
vnd,foo -
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.
mks_canable_v10/stm32f072xb target
Type |
Location |
Description |
Compatible |
|---|---|---|---|
CPU |
on-chip |
ARM Cortex-M0 CPU1 |
|
ADC |
on-chip |
STM32 ADC1 |
|
CAN |
on-chip |
STM32 CAN controller1 |
|
Clock control |
on-chip |
STM32F0/G0 RCC (Reset and Clock controller)1 |
|
on-chip |
STM32 HSE Clock1 |
||
on-chip |
|||
on-chip |
STM32 LSE Clock1 |
||
on-chip |
STM32F0/F3 Main PLL1 |
||
Counter |
on-chip |
STM32 counters9 |
|
CRC |
on-chip |
STM32 CRC calculation unit1 |
|
DAC |
on-chip |
STM32 family DAC1 |
|
DMA |
on-chip |
STM32 DMA controller (V2bis) for the stm32F0, stm32F1 and stm32L1 soc families1 |
|
Flash controller |
on-chip |
STM32 Family flash controller1 |
|
GPIO & Headers |
on-chip |
STM32 GPIO Controller6 |
|
I2C |
on-chip |
STM32 I2C V2 controller2 |
|
Input |
on-chip |
STM32 Tocuh Sensing Controller (TSC) driver1 |
|
Interrupt controller |
on-chip |
ARMv6-M NVIC (Nested Vectored Interrupt Controller) controller1 |
|
on-chip |
STM32 External Interrupt Controller1 |
||
LED |
on-board |
Group of GPIO-controlled LEDs1 |
|
Memory controller |
on-chip |
STM32 Battery Backed RAM1 |
|
MTD |
on-chip |
STM32 flash memory1 |
|
NVMEM |
on-chip |
Fixed layout for Non-Volatile memory1 |
|
OTP memory |
on-chip |
STM32 embedded NVM OTP1 |
|
PHY |
on-chip |
This binding is to be used by all the usb transceivers which are built-in with USB IP1 |
|
Pin control |
on-chip |
STM32 Pin controller1 |
|
PWM |
on-chip |
STM32 PWM7 |
|
Reset controller |
on-chip |
STM32 Reset and Clock Control (RCC) Controller1 |
|
RTC |
on-chip |
STM32 RTC1 |
|
Sensors |
on-chip |
STM32 VREF+1 |
|
on-chip |
STM32 family TEMP node for production calibrated sensors with two calibration temperatures1 |
||
on-chip |
STM32 VBAT1 |
||
Serial controller |
on-chip |
STM32 USART4 |
|
SMbus |
on-chip |
STM32 SMBus controller2 |
|
SPI |
on-chip |
STM32 SPI controller with embedded Rx and Tx FIFOs2 |
|
Timer |
on-chip |
ARMv6-M System Tick1 |
|
on-chip |
STM32 timers9 |
||
USB |
on-chip |
STM32 USB controller1 |
|
Watchdog |
on-chip |
STM32 watchdog1 |
|
on-chip |
STM32 system window watchdog1 |
Connections and IOs
Default Zephyr Peripheral Mapping:
BOOT : BOOT0
CAN_RX : PB8
CAN_TX : PB9
D1 : PA0
D2 : PA1
USB_DN : PA11
USB_DP : PA12
SWDIO : PA13
SWCLK : PA14
NRST
For more details please refer to MKS CANable V1.0 schematic [2].
System Clock
The MKS CANable V1.0 system clock is driven by internal high speed oscillator. By default system clock is driven by PLL clock at 48 MHz, the PLL is driven by the 8 MHz high speed internal oscillator.
The CAN1 peripheral is driven by PLL, which has 48 MHz frequency.
Programming and Debugging
The mks_canable_v10 board supports the runners and associated west commands listed below.
| flash | debug | debugserver | attach | rtt | reset | |
|---|---|---|---|---|---|---|
| dfu-util | ✅ (default) | |||||
| jlink | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ |
| openocd | ✅ | ✅ (default) | ✅ | ✅ | ✅ |
The MKS CANable V1.0 board includes an SWDIO debug connector header J2.
Note
The debugger is not part of the board!
Applications for the mks_canable_v10 board target can be built and
flashed in the usual way (see Building an Application and
Run an Application for more details).
Flashing
The board could be flashed using west.
Flashing an application to MKS CANable V1.0 via USB DFU
If flashing via USB DFU, connect the short-circuit cap to the two pins of BOOT (J5) when applying power to the MKS CANable V1.0 board in order to enter the built-in DFU mode.
Here is an example for the Blinky application.
# From the root of the zephyr repository
west build -b mks_canable_v10 samples/basic/blinky
west flash
Flashing an application to MKS CANable V1.0 via SWD Debugger
The debugger shall be wired to MKS CANable V1.0 board’s J2 connector according MKS CANable V1.0 schematic [2].
Build and flash an application. Here is an example for using OpenOCD Hello World.
west build -b mks_canable_v10 -S rtt-console samples/hello_world
west flash --runner openocd
The argument -S rtt-console is needed for debug purposes with SEGGER RTT
protocol. This option is optional and may be omitted. Omitting it frees up
RAM space but prevents RTT usage.
If option -S rtt-console is selected, the connection to the target can be
established as follows:
$ telnet localhost 9090
You should see the following message on the console:
$ Hello World! mks_canable_v10/stm32f072xb
Note
Current OpenOCD config will skip Segger RTT for OpenOCD under 0.12.0.
Debugging
You can debug an application in the usual way. Here is an example for the Hello World application.
# From the root of the zephyr repository
west build -b mks_canable_v10 samples/hello_world
west debug