QEMU Emulation for ARM AArch64 Virt KVM

Board Overview

Name:

qemu_kvm_arm64

Vendor:

ARM Ltd.

Status:

Maintained

Architecture:

arm64

SoC:

qemu_virt_arm64

Browse board sources

Overview

This board configuration will use QEMU to run a KVM guest on an AArch64 host.

This configuration provides support for an AArch64 Cortex-A CPU and these devices:

• GICv3 interrupt controller

• ARM architected timer

• PL011 UART controller

Hardware

Supported Features

The qemu_kvm_arm64 board supports the hardware features listed below.

on-chip / on-board

Feature integrated in the SoC / present on the board.

2 / 2

Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.

vnd,foo

Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

qemu_kvm_arm64/qemu_virt_arm64 target

Type	Location	Description	Compatible
Clock control	on-chip	Generic fixed-rate clock provider1	fixed-clock
Interrupt controller	on-chip	ARM Generic Interrupt Controller v31	arm,gic-v3
	on-chip	GIC v3 Interrupt Translation Service1	arm,gic-v3-its
PCIe	on-chip	PCIe Controller in ECAM mode1	pci-host-ecam-generic
Power management CPU operations	on-board	Power State Coordination Interface (PSCI) version 0.21	arm,psci-0.2
Serial controller	on-chip	ARM PL011 UART1	arm,pl011
SRAM	on-board	Generic on-chip SRAM1	mmio-sram
Timer	on-chip	per-core ARM architected timer1	arm,armv8-timer

Devices

System Clock

This board configuration uses the host system clock frequency.

Serial Port

This board configuration uses a single serial communication channel with the CPU’s UART0.

Programming and Debugging

The qemu_kvm_arm64 board supports the runners and associated west commands listed below.

	flash	debug

Refer to the qemu_cortex_a53 board instructions for this part.

Debugging

Refer to the detailed overview about Application Debugging.