QEMU Emulation for MIPS Malta

Board Overview

Name:

qemu_malta

Vendor:

QEMU, a generic and open source machine emulator and virtualizer

Status:

Not actively maintained

Architecture:

mips

SoC:

qemu_malta

Browse board sources

Overview

This board configuration will use QEMU to emulate the MIPS Malta platform.

This configuration provides support for an MIPS 4Kc/24Kc CPU cores and these devices:

• CP0 Interrupt Controller

• CP0 Core Timer

• NS16550 UART

Note

This board configuration makes no claims about its suitability for use with an actual MIPS Malta hardware system, or any other hardware system.

Hardware

Supported Features

The qemu_malta board supports the hardware features listed below.

on-chip / on-board

Feature integrated in the SoC / present on the board.

2 / 2

Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.

vnd,foo

Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

qemu_malta/qemu_malta target

Type	Location	Description	Compatible
Interrupt controller	on-board	MIPS CPU interrupt controller1	mti,cpu-intc
Serial controller	on-board	ns16550 UART1	ns16550
SRAM	on-board	Generic on-chip SRAM1	mmio-sram

qemu_malta/qemu_malta/be target

Type	Location	Description	Compatible
Interrupt controller	on-board	MIPS CPU interrupt controller1	mti,cpu-intc
Serial controller	on-board	ns16550 UART1	ns16550
SRAM	on-board	Generic on-chip SRAM1	mmio-sram

Devices

System Clock

Qemu CP0 timer uses a clock frequency of 200 MHz, see target/mips/cp0_timer.c in Qemu source tree for details.

Serial Port

This board configuration uses a single serial communication channel with the FPGA UART2.

Programming and Debugging

The qemu_malta board supports the runners and associated west commands listed below.

	flash	debug

Use this configuration to run basic Zephyr applications and kernel tests in the QEMU emulated environment, for example, with the Basic Synchronization sample:

# From the root of the zephyr repository
west build -b qemu_malta samples/synchronization
west build -t run

This will build an image with the synchronization sample app, boot it using QEMU, and display the following console output:

*** Booting Zephyr OS build v2.7.99-1627-g9bea7790d620  ***
thread_a: Hello World from cpu 0 on qemu_malta!
thread_b: Hello World from cpu 0 on qemu_malta!
thread_a: Hello World from cpu 0 on qemu_malta!
thread_b: Hello World from cpu 0 on qemu_malta!
thread_a: Hello World from cpu 0 on qemu_malta!
thread_b: Hello World from cpu 0 on qemu_malta!
thread_a: Hello World from cpu 0 on qemu_malta!
thread_b: Hello World from cpu 0 on qemu_malta!
thread_a: Hello World from cpu 0 on qemu_malta!
thread_b: Hello World from cpu 0 on qemu_malta!

Exit QEMU by pressing CTRL+A x.

Big-Endian

Use this configuration to run Basic Synchronization sample in big-endian mode:

# From the root of the zephyr repository
west build -b qemu_malta/qemu_malta/be samples/synchronization
west build -t run

References

https://www.qemu.org/ https://www.linux-mips.org/wiki/MIPS_Malta