QEMU Emulation for Renesas RX

Overview

This board configuration will use QEMU to emulate the Renesas RXv1 platform.

This configuration provides support for the R5F562N8 MCU and below devices:

  • On-chip memory (ROM 512KB, RAM 96KB)

  • Interrupt Control Unit (ICUa)

  • Compare Match Timer x 2CH (CMT0,1)

  • Serial Communication Interface x 1CH (SCI0)

Hardware

Supported Features

The qemu_rx board supports the hardware features listed below.

on-chip / on-board
Feature integrated in the SoC / present on the board.
2 / 2
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.
vnd,foo
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

qemu_rx/r5f562n8 target

Type

Location

Description

Compatible

CPU

on-chip

Renesas RXv1 CPU1

renesas,rxv1

Clock control

on-chip

Renesas RX Root Clock Generation Circuit41

renesas,rx-cgc-root-clock

on-chip

Renesas RX Clock Generation Circuit PLL Clock1

renesas,rx-cgc-pll

on-chip

Renesas RX clock control node pclk block1

renesas,rx-cgc-pclk-block

on-chip

Renesas RX Clock Control Peripheral Clock4

renesas,rx-cgc-pclk

Interrupt controller

on-chip

Renesas ICU Interrupt controller1

renesas,rx-icu

Miscellaneous

on-chip

Renesas RX SCI controller1

renesas,rx-sci

MTD

on-chip

Flash node1

soc-nv-flash

Renesas RX

on-chip

Renesas RX SWINT (Software Interrupt)1

renesas,rx-swint

Serial controller

on-chip

Renesas RX SCI QEMU controller1

renesas,rx-uart-sci-qemu

SRAM

on-chip

Generic on-chip SRAM1

mmio-sram

Timer

on-chip

Renesas RX timer node1

renesas,rx-timer-cmt-start-control

on-chip

Renesas RX timer node2

renesas,rx-timer-cmt

Devices

System Clock

This board configuration uses a system clock frequency of 6 MHz generated by the CMT timer.

Serial Port

This board configuration uses a single serial communication channel on the SCI UART channel 0.

Programming and Debugging

The qemu_rx board supports the runners and associated west commands listed below.

flash debug debugserver
qemu ✅ (default) ✅ (default)

Use this configuration to run basic Zephyr applications and kernel tests in the QEMU emulated environment, for example, with the Basic Synchronization sample:

# From the root of the zephyr repository
west build -b qemu_rx samples/synchronization
west build -t run

This will build an image with the synchronization sample app, boot it using QEMU, and display the following console output:

*** Booting Zephyr OS build v4.1.0-3157-gb30f8b6a7327 ***
thread_a: Hello World from cpu 0 on qemu_rx!
thread_b: Hello World from cpu 0 on qemu_rx!
thread_a: Hello World from cpu 0 on qemu_rx!
thread_b: Hello World from cpu 0 on qemu_rx!
thread_a: Hello World from cpu 0 on qemu_rx!
thread_b: Hello World from cpu 0 on qemu_rx!
thread_a: Hello World from cpu 0 on qemu_rx!
thread_b: Hello World from cpu 0 on qemu_rx!
thread_a: Hello World from cpu 0 on qemu_rx!
thread_b: Hello World from cpu 0 on qemu_rx!

Exit QEMU by pressing CTRL+A x.

References

https://www.qemu.org/