SECO SBC-3.5-PX30 (JUNO - D23) (STM32F302)

Board Overview

SECO SBC-3.5-PX30 (JUNO - D23) (STM32F302)

Name:

stm32f3_seco_d23

Vendor:

SECO S.p.A.

Architecture:

arm

SoC:

stm32f302xc

Browse board sources

Overview

SBC-3.5-PX30 (JUNO - D23) is a Single Board Computer based on embedded Rockchip PX30 Processor, featuring Quad-Core ARM Cortex-A35 processor. The processor integrates a Mali-G31 GPU with High performance dedicated 2D processor, supporting OpenGL ES 1.1 / 2.0 / 3.2, Vulkan 1.0, OpenCL 2.0 and Open VG 1.1. Embedded VPU is able to support video decoding of the most common coding standard (MPEG-4, H.265/HEVC, H.264, VP8, VC-1). The board is completed with up to 4GB LPDDR4-3200 32-bit bus memory directly soldered on board and one eMMC 5.1 Flash Drive with up to 64GB of capacity. LVDS Single Channel interface and HDMI are supported. The RMII interface and Micrel KSZ8091 Ethernet Transceiver allow the implementation of a Fast Ethernet interface. The networking capabilities can be extended by WiFi+BT M.2 module and external modem module. The audio functionalities are managed by the AudioCodec embedded in the RK-809 PMIC. SBC-3.5-PX30 board is completed by a series of connectors with various interfaces (UART, SPI, I2C) managed by the microcontroller STM32F302VCT6.

Hardware

SECO SBC-3.5-PX30 provides the following hardware components:

• STM32F302VCT6 - ARM® 32-bit Cortex® -M4 CPU with FPU - 256 KB Flash - 40 KB SRAM - 72 MHz max CPU frequency

• 2 User LEDs

• 16 GPI

• 16 GPO

• 4 U(S)ART - Modbus - RS485 - TTL Serial Debug - TTL Serial

• 8-channel General Purpose Timers

• USB 2.0 full speed interface

• CAN

• I2C (up to 2)

• SPI

More information about STM32F302VC can be found here:

• STM32F302VC on www.st.com

• STM32F302xC reference manual

Supported Features

The stm32f3_seco_d23 board supports the hardware features listed below.

on-chip / on-board

Feature integrated in the SoC / present on the board.

2 / 2

Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.

vnd,foo

Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

stm32f3_seco_d23/stm32f302xc target

Type	Location	Description	Compatible
CPU	on-chip	ARM Cortex-M4F CPU1	arm,cortex-m4f
ADC	on-chip	STM32 ADC1	st,stm32-adc
CAN	on-chip	STM32 CAN controller1	st,stm32-bxcan
Clock control	on-chip	STM32F3 RCC (Reset and Clock controller)1	st,stm32f3-rcc
	on-chip	STM32 HSE Clock1	st,stm32-hse-clock
	on-chip	Generic fixed-rate clock provider1 1	fixed-clock
	on-chip	STM32 LSE Clock1	st,stm32-lse-clock
	on-chip	STM32F0/F3 Main PLL1	st,stm32f0-pll-clock
Counter	on-chip	STM32 counters7	st,stm32-counter
DAC	on-chip	STM32 family DAC1	st,stm32-dac
DMA	on-chip	STM32 DMA controller (V2bis) for the stm32F0, stm32F1 and stm32L1 soc families2	st,stm32-dma-v2bis
Flash controller	on-chip	STM32 Family flash controller1	st,stm32-flash-controller
GPIO & Headers	on-chip	STM32 GPIO Controller6	st,stm32-gpio
I2C	on-chip	STM32 I2C V2 controller1 1	st,stm32-i2c-v2
Interrupt controller	on-chip	ARMv7-M NVIC (Nested Vectored Interrupt Controller)1	arm,v7m-nvic
	on-chip	STM32 External Interrupt Controller1	st,stm32-exti
LED	on-board	Group of GPIO-controlled LEDs1	gpio-leds
MTD	on-chip	STM32 flash memory1	st,stm32-nv-flash
	on-board	Fixed partitions of a flash (or other non-volatile storage) memory1	fixed-partitions
PHY	on-chip	This binding is to be used by all the usb transceivers which are built-in with USB IP1	usb-nop-xceiv
	on-board	Simple GPIO controlled CAN transceiver1	can-transceiver-gpio
Pin control	on-chip	STM32 Pin controller1	st,stm32-pinctrl
PWM	on-chip	STM32 PWM2 5	st,stm32-pwm
Regulator	on-board	Fixed voltage regulators4	regulator-fixed
Reset controller	on-chip	STM32 Reset and Clock Control (RCC) Controller1	st,stm32-rcc-rctl
RTC	on-chip	STM32 RTC1	st,stm32-rtc
Sensors	on-chip	STM32 family TEMP node for production calibrated sensors with two calibration temperatures1	st,stm32-temp-cal
	on-chip	STM32 VREF+1	st,stm32-vref
	on-chip	STM32 VBAT1	st,stm32-vbat
Serial controller	on-chip	STM32 USART1 2	st,stm32-usart
	on-chip	STM32 UART2	st,stm32-uart
SMbus	on-chip	STM32 SMBus controller2	st,stm32-smbus
SPI	on-chip	STM32 SPI controller with embedded Rx and Tx FIFOs2 1	st,stm32-spi-fifo
SRAM	on-chip	Generic on-chip SRAM description1	mmio-sram
Timer	on-chip	ARMv7-M System Tick1	arm,armv7m-systick
	on-chip	STM32 timers2 7	st,stm32-timers
USB	on-chip	STM32 USB controller1	st,stm32-usb
Watchdog	on-chip	STM32 watchdog1	st,stm32-watchdog
	on-chip	STM32 system window watchdog1	st,stm32-window-watchdog

Pin Mapping

SBC-3.5-PX30 has 6 GPIO controllers. These controllers are responsible for pin muxing, input/output, pull-up, etc.

For more details please refer to SECO SBC-3.5-PX30 board User Manual.

Default Zephyr Peripheral Mapping:

• UART_1_TX : PA9 (debug config for UART_1)

• UART_1_RX : PA10 (debug config for UART_1)

• UART_1_TX : PC4 (alternate config for UART_1)

• UART_1_RX : PC5 (alternate config for UART_1)

• UART_2_TX : PD5

• UART_2_RX : PD6

• UART_2_CLK : PD7

• UART_2_CTS : PD3

• UART_2_RTS/DE : PD4

• UART_3_TX : PC10

• UART_3_RX : PC11

• UART_3_CLK : PD10

• UART_3_CTS : PD11

• UART_3_RTS/DE : PD12

• UART_5_TX : PC12

• UART_5_RX : PD2

• I2C1_SCL : PB6

• I2C1_SDA : PB7

• I2C2_SCL : PA9 (alternate config for UART_1)

• I2C2_SDA : PA10 (alternate config for UART_1)

• SPI1_NSS : PA4

• SPI1_SCK : PB3

• SPI1_MISO : PB4

• SPI1_MOSI : PB5

• SPI2_NSS : PB12

• SPI2_SCK : PB13

• SPI2_MISO : PB14

• SPI2_MOSI : PB15

• CAN1_RX : PB8

• CAN1_TX : PB9

• USB_DM : PA11

• USB_DP : PA12

• LD1 : PD8

• LD2 : PD9

• PWM : PA8

System Clock

SECO SBC-3.5-PX30 System Clock could be driven by internal or external oscillator, as well as main PLL clock. By default System clock is driven by PLL clock at 72 MHz, driven by an external oscillator at 8 MHz.

Serial Port

SECO SBC-3.5-PX30 has up to 4 U(S)ARTs. The Zephyr console output is assigned to UART1. Default settings are 115200 8N1. In debug configuration UART1 is connected to the flashing connector CN56.

UART2 provides Modbus interface to connector CN28. UART3 provides RS-485 interface to connectors CN57 and CN48. In alternative config, USART2 and USART3 are exposed to connector J2.

UART1 (in alternate config) and UART5 are connected to CN32.

I2C

SECO SBC-3.5-PX30 has up to 2 I2Cs. Both are present in connector CN33. I2C2 is available only on boards where DEBUG serial is not connected.

USB

SECO SBC-3.5-PX30 has a USB 2.0 full-speed device interface available through its connector CN31.

CAN

SECO SBC-3.5-PX30 has an onboard CAN transceiver (TJA1051T), and it is connected to both CN29 and CN30. PD0 is connected to EC_CAN_STBY.

SPI

SECO SBC-3.5-PX30 has two SPI lines: SPI1 is an internal SPI line connected to the main processor (Rockchip PX30) and SPI2 is connected to CN39.

Programming and Debugging

Flashing

Applications for the stm32f3_seco_d23 board configuration can be built and flashed in the usual way (see Building an Application and Run an Application for more details).

Flashing an application to SECO SBC-3.5-PX30

First, connect the SECO SBC-3.5-PX30 to your host computer using CN56 connector to an ST-Link.

The pinout is (1-8):

• VDD

• UART1_TX

• UART1_RX

• BOOT_0

• SWDIO_JTMS

• SWCLK_JTCK

• EC_RST#

• GND

Then build and flash your application.

Here is an example for the Hello World application.

# From the root of the zephyr repository
west build -b stm32f3_seco_d23 samples/hello_world
west flash

Run a serial host program to connect with your board.

$ minicom -D /dev/<tty device>

Replace <tty_device> with the port where the SBC-3.5-PX30 board can be found.

You should see the following message on the console:

Hello World! stm32f3_seco_d23