CRD40L50-POC-Q
Overview
The CRD40L50-POC-Q “Blackstar” demonstration board is a hardware platform used to evaluate Cirrus Logic CS40L50 haptic drivers. The board provides a set of features that enables programming the on-board STM32F401xD microcontroller with custom sample applications, including the CS40L5x sample provided in Zephyr’s samples directory.
Hardware
STM32F401xD microcontroller
AT25 SPI flash controller with 256 KiB flash memory
32.768 kHz crystal oscillator
Two pass/fail LEDs, one green and one red
Three yellow user LEDs
One user push button
Power source selector switch
Actuator output for LRAs
One Pico-Clasp connector for GPIOs
One USB-C port for Cirrus Logic ETHapBridge connectivity
Programming and debugging of on-board STM32F401xD through Serial Wire Debug (SWD)
Supported Features
The crd40l50 board supports the hardware features listed below.
- on-chip / on-board
- Feature integrated in the SoC / present on the board.
- 2 / 2
-
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files. -
vnd,foo -
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.
crd40l50/stm32f401xd target
Type |
Location |
Description |
Compatible |
|---|---|---|---|
CPU |
on-chip |
ARM Cortex-M4F CPU1 |
|
ADC |
on-chip |
STM32F4 ADC1 |
|
Clock control |
on-chip |
STM32F4 RCC (Reset and Clock controller)1 |
|
on-chip |
STM32 HSE Clock1 |
||
on-chip |
|||
on-chip |
STM32F4 Main PLL1 |
||
on-chip |
STM32F4 PLL I2S1 |
||
on-chip |
STM32 Microcontroller Clock Output (MCO)2 |
||
Counter |
on-chip |
STM32 counters8 |
|
DMA |
on-chip |
STM32 DMA controller (V1)2 |
|
Flash controller |
on-chip |
STM32 Family flash controller1 |
|
GPIO & Headers |
on-chip |
STM32 GPIO Controller8 |
|
Haptics |
on-board |
I2C-based CS40L5x Haptic Driver1 |
|
I2C |
on-chip |
||
I2S |
on-chip |
STM32 I2S controller2 |
|
Input |
on-board |
Group of GPIO-bound input keys1 |
|
Interrupt controller |
on-chip |
ARMv7-M NVIC (Nested Vectored Interrupt Controller)1 |
|
on-chip |
STM32 External Interrupt Controller1 |
||
LED |
on-board |
Group of GPIO-controlled LEDs1 |
|
Memory controller |
on-chip |
STM32 Battery Backed RAM1 |
|
MMC |
on-chip |
STM32 SDMMC Disk Access1 |
|
MTD |
on-chip |
STM32F4 flash memory1 |
|
on-board |
Fixed partitions of a flash (or other non-volatile storage) memory1 |
||
on-board |
AT25XV021A SPI flash variants1 |
||
PHY |
on-chip |
This binding is to be used by all the usb transceivers which are built-in with USB IP1 |
|
Pin control |
on-chip |
STM32 Pin controller1 |
|
Power management |
on-chip |
STM32 power controller1 |
|
PWM |
on-chip |
STM32 PWM8 |
|
Reset controller |
on-chip |
STM32 Reset and Clock Control (RCC) Controller1 |
|
RTC |
on-chip |
STM32 RTC1 |
|
Sensors |
on-chip |
STM32 quadrature decoder5 |
|
on-chip |
STM32 family TEMP node for production calibrated sensors with two calibration temperatures1 |
||
on-chip |
STM32 VREF+1 |
||
on-chip |
STM32 VBAT1 |
||
Serial controller |
on-chip |
STM32 USART3 |
|
on-board |
Segger RTT UART1 |
||
SMbus |
on-chip |
STM32 SMBus controller3 |
|
SPI |
on-chip |
||
Timer |
on-chip |
ARMv7-M System Tick1 |
|
on-chip |
STM32 timers8 |
||
USB |
on-chip |
STM32 OTGFS controller1 |
|
Watchdog |
on-chip |
STM32 watchdog1 |
|
on-chip |
STM32 system window watchdog1 |
Connections and IOs
Molex 1053131302 connector (J4) for haptic output
JST S2B-PH-SM4-TB(LF)(SN) connector (J5) for external power sources
SWD header (J7) for J-Link debug probes
Molex 203559-0607 connector (J8) for GPIOs
USB-C port (J10) for ETHapBridge connectivity
Programming & Debugging
The crd40l50 board supports the runners and associated west commands listed below.
| flash | debug | debugserver | attach | rtt | |
|---|---|---|---|---|---|
| jlink | ✅ | ✅ | ✅ | ✅ | ✅ |
| openocd | ✅ | ✅ (default) | ✅ | ✅ | ✅ |
| stm32cubeprogrammer | ✅ (default) |
Flash Using J-Link
To flash the board using the J-Link debugger, follow the steps below:
Install J-Link Software
Download and install the J-Link software tools from Segger.
Make sure the installed J-Link executables (e.g.,
JLink,JLinkRTTViewer) are available in your system’s PATH.
Connect the Board
Connect the J-Link Debug Probe to the board’s SWD header (J7).
Connect the other end of the J-Link Debug Probe to your host machine via USB.
Connect the VBAT connector (J5) to an external power source to power up the board.
Build the Application
You can build a sample Zephyr application, such as Blinky or cs40l5x, using the
westtool. Run the following commands from your Zephyr workspace:west build -b crd40l50 -p always samples/drivers/haptics/cs40l5xThis will build the CS40L5x sample application for the
crd40l50board.Flash the Device
Once the build completes, flash the firmware using:
west flash --runner jlinkThis uses the
jlinkrunner to flash the application to the board.Observe the Result
After flashing, interact with the Shell interface via
JLinkRTTViewerto demo the on-board CS40L50 haptics driver.