PSOC™ 4100S Max pioneer kit

Overview

The CY8CKIT-041S-MAX is a pioneer kit based on the PSOC™ 4100S Max family, featuring a PSOC™ 4100S Max (CY8C4149AZI_S598) microcontroller with an Arm® Cortex®-M0+ core running at up to 48 MHz. It is designed for capacitive touch sensing and general-purpose embedded applications.

Key features include 384 KB flash, 32 KB SRAM, CAPSENSE™ buttons, touchpad, slider, and proximity sensing, a thermistor, and an onboard KitProg3 programmer/debugger with USB Micro-B connectivity.

Hardware

SoC: PSOC™ 4100S Max (CY8C4149AZI_S598)
CPU: Arm® Cortex®-M0+ at 48 MHz
Flash: 384 KB
SRAM: 32 KB
Peripherals: SAR ADC, TCPWM, SCB (UART/SPI/I2C)
Touch Sensing: CAPSENSE™ buttons, touchpad, slider, and proximity sensing
Sensors: Thermistor for temperature measurement
Debug: Onboard KitProg3 (SWD + UART bridge)
Power: USB powered via Micro-B connector (5V operating)

For more information about the PSOC™ 4100S Max and CY8CKIT-041S-MAX:

Kit Contents

PSOC™ 4100S Max Pioneer Kit board
CAPSENSE™ expansion board
USB-A to Micro-B cable
6 jumper wires
40-pin FFC cable
Quick start guide

Supported Features

The cy8ckit_041s_max board supports the hardware features listed below.

on-chip / on-board: Feature integrated in the SoC / present on the board.
2 / 2: Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.
vnd,foo: Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

`cy8ckit_041s_max/cy8c4149azi_s598` target

On-target memory for this board target: 32 KiB of RAM, 384 KiB of Flash.

Type	Location	Description	Compatible
CPU	on-chip	ARM Cortex-M0+ CPU1	`arm,cortex-m0+`
ADC	on-chip	Infineon SAR ADC1	`infineon,sar-adc`
ARM architecture	on-chip	Infineon Serial Communication Blocks (SCB) node3	`infineon,scb`
Clock control	on-chip	Generic fixed-rate clock provider4	`infineon,fixed-clock`
	on-chip	Generic fixed-rate clock provider2	`infineon,fixed-factor-clock`
	on-chip	infineon peripheral divider5 13	`infineon,peri-div`
Counter	on-chip	Infineon TCPWM counter8	`infineon,tcpwm-counter`
DMA	on-chip	Infineon DMAC1	`infineon,dmac`
Flash controller	on-chip	Infineon CAT1 flash controller1	`infineon,flash-controller`
GPIO & Headers	on-chip	Infineon GPIO Port3 10	`infineon,gpio`
GPIO & Headers	on-chip	Infineon Shared GPIO Set1	`infineon,shared-gpio`
Interrupt controller	on-chip	ARMv6-M NVIC (Nested Vectored Interrupt Controller) controller1	`arm,v6m-nvic`
LED	on-board	Group of GPIO-controlled LEDs1	`gpio-leds`
MTD	on-chip	Flash node1	`soc-nv-flash`
Pin control	on-chip	Infineon CAT1 Pinctrl Container1	`infineon,pinctrl`
PWM	on-chip	Infineon TCPWM PWM8	`infineon,tcpwm-pwm`
Serial controller	on-chip	Infineon CAT1 UART1	`infineon,uart`
SPI	on-chip	Infineon CAT1 SPI1	`infineon,spi`
SRAM	on-chip	Generic on-chip SRAM1	`mmio-sram`
Timer	on-chip	ARMv6-M System Tick1	`arm,armv6m-systick`
Timer	on-chip	Infineon TCPWM Timer8	`infineon,tcpwm`
Watchdog	on-chip	Infineon CAT1 Watchdog1	`infineon,watchdog`

Connections and IOs

LEDs

Name	GPIO Pin
LED0	P7.3 (active low)

Default Zephyr Peripheral Mapping

Pin	Function	Usage
P0.5	SCB2 UART TX	Console TX
P0.4	SCB2 UART RX	Console RX
P7.3	GPIO	LED0

System Clock

The PSOC™ 4100S Max uses the Internal Main Oscillator (IMO) as the default system clock source. The clock path is:

IMO (Internal Main Oscillator): 48 MHz
CLK_HF: 48 MHz (system clock)

Serial Port

The PSOC™ 4100S Max has multiple SCB (Serial Communication Block) interfaces that can be configured as UART, SPI, or I2C. The Zephyr console output is assigned to SCB2 (uart2), which is routed through the KitProg3 USB-UART bridge.

Default communication settings are 115200 8N1.

Building

Here is an example for the Hello World application.

# From the root of the zephyr repository
west build -b cy8ckit_041s_max samples/hello_world

Programming and Debugging

The cy8ckit_041s_max board supports the runners and associated west commands listed below.

	flash	debug	rtt	debugserver	attach
openocd	✅ (default)	✅ (default)	✅	✅	✅

The CY8CKIT-041S-MAX includes an onboard programmer/debugger (KitProg3) which can be used to program and debug the PSOC™ 4100S Max Cortex-M0+ core.

Infineon OpenOCD Installation

The ModusToolbox™ Programming Tools package includes Infineon OpenOCD. Alternatively, a standalone installation can be done by downloading the Infineon OpenOCD release for your system and extracting the files to a location of your choice.

Note

Linux requires device access rights to be set up for KitProg3. This is handled automatically by the ModusToolbox™ Programming Tools installation. When doing a standalone OpenOCD installation, this can be done manually by executing the script openocd/udev_rules/install_rules.sh.

Configuring a Console

Connect a USB cable from your PC to the KitProg3 USB Micro-B connector (J8) on the CY8CKIT-041S-MAX.Use the serial terminal of your choice (minicom, PuTTY, etc.) with the following settings:

Speed: 115200
Data: 8 bits
Parity: None
Stop bits: 1

Flashing

One time, set the Infineon OpenOCD path:

west config build.cmake-args -- "-DOPENOCD=path/to/infineon/openocd/bin/openocd.exe"

Build and flash the application:

west build -b cy8ckit_041s_max -p always samples/hello_world
west flash