PSOC™ Edge E84 Evaluation Kit
Overview
The PSOC™ Edge E84 Evaluation Kit (KIT_PSE84_EVAL) enables applications to use the PSOC™ Edge E84 Series Microcontroller (MCU) together with multiple on-board multimedia, Machine Learning (ML), and connectivity features including custom MIPI-DSI displays, audio interfaces, and AIROC™ Wi-Fi and Bluetooth® combo-based connectivity modules.
The PSOC™ Edge E84 MCUs are based on high-performance Arm® Cortex®-M55 including Helium DSP support, an Ethos™-U55 NPU, and a low-power Arm® Cortex®-M33 paired with Infineon’s ultra-low power NNLite hardware accelerator. They integrate 2.5D graphics accelerators and display interfaces, while featuring always-on acoustic activity and wake-word detection, efficient HMI operations, and extended battery life.
The evaluation kit carries a PSOC™ Edge E84 MCU on a SODIMM-based detachable SOM board connected to the baseboard. The MCU SOM also has 128 MB of QSP| Flash, 1GB of Octal Flash, 128MB of Octal RAM, PSOC™ 4000T as CAPSENSE™ co-processor, and onboard AIROC™ Wi-Fi and Bluetooth® combo.
Hardware
For more information about the PSOC™ Edge E84 MCUs and the PSOC™ Edge E84 Evaluation Kit:
Kit Features:
Cortex®-M55 CPU with Helium™ DSP
Advanced ML with Arm Ethos™-U55 NPU
Low-Power Cortex®-M33
NNLite ultra-low power NPU
Analog and Digital Microphones
State-of-the-Art Secured Enclave
Integrated Programmer/Debugger
Kit Contents:
PSOC™ Edge E84 base board
PSOC™ Edge E84 SOM module
4.3in capacitive touch display and USB camera module
USB Type C to Type-C cable
Two proximity sensor wires
Four stand-offs for Raspberry Pi compatible display
Quick start guide
Supported Features
The kit_pse84_eval board supports the hardware features listed below.
- on-chip / on-board
- Feature integrated in the SoC / present on the board.
- 2 / 2
-
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files. -
vnd,foo -
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.
kit_pse84_eval/pse846gps2dbzc4a/m33 target
Type |
Location |
Description |
Compatible |
|---|---|---|---|
CPU |
on-chip |
ARM Cortex-M33 CPU1 |
|
ADC |
on-chip |
PSOC Edge AutAnalog SAR ADC1 |
|
ARM architecture |
on-chip |
Infineon Serial Communication Blocks (SCB) node9 |
|
Audio |
on-chip |
Infineon PDM (Pulse Density Modulation) Controller1 |
|
Bluetooth |
on-board |
Connectivity chip that uses Infineon Bluetooth Host Controller Interface UART driver1 |
|
CAN |
on-chip |
Infineon CAN FD controller wrapper. 1 |
|
on-chip |
Infineon MCAN Driver2 |
||
Clock control |
on-chip |
Generic fixed-rate clock provider5 |
|
on-chip |
Generic fixed-rate clock provider20 |
||
on-chip |
|||
Comparator |
on-chip |
Infineon Low Power Comparator (LPComp) for CAT1 family1 |
|
on-chip |
Infineon LPComp channel node (child of infineon,lp-comp)2 |
||
Counter |
on-chip |
Infineon TCPWM counter32 |
|
DMA |
on-chip |
Infineon CAT1 DMA2 |
|
Flash controller |
on-board |
Infineon CAT1 QSPI flash controller1 |
|
GPIO & Headers |
on-chip |
||
I2C |
on-chip |
Infineon CAT1 I2C driver1 |
|
I2S |
on-chip |
Infineon I2S Controller2 |
|
Input |
on-board |
Group of GPIO-bound input keys1 |
|
Interrupt controller |
on-chip |
ARMv8-M NVIC (Nested Vectored Interrupt Controller)1 |
|
LED |
on-board |
Group of GPIO-controlled LEDs1 |
|
Multi-Function Device |
on-chip |
Infineon AutAnalog (Autonomous Analog) Multi-Function Device1 |
|
MTD |
on-chip |
Flash node2 |
|
on-board |
Fixed partitions of a flash (or other non-volatile storage) memory1 |
||
Pin control |
on-chip |
Infineon CAT1 Pinctrl Container1 |
|
PWM |
on-chip |
Infineon TCPWM PWM32 |
|
RTC |
on-chip |
Infineon CAT1 family RTC device1 |
|
SDHC |
on-chip |
Infineon CAT1 SDHC/SDIO controller2 |
|
Sensors |
on-board |
The BMI270 is an inertial measurement unit1 |
|
Serial controller |
on-chip |
Infineon CAT1 UART2 |
|
SRAM |
on-chip |
Generic on-chip SRAM1 |
|
Timer |
on-chip |
||
on-chip |
Infineon TCPWM Timer32 |
||
on-chip |
ARMv8-M System Tick1 |
||
USB |
on-chip |
Infineon USBHS1 |
|
Watchdog |
on-chip |
Infineon CAT1 Watchdog1 |
kit_pse84_eval/pse846gps2dbzc4a/m33/ns target
Type |
Location |
Description |
Compatible |
|---|---|---|---|
CPU |
on-chip |
ARM Cortex-M33 CPU1 |
|
ADC |
on-chip |
PSOC Edge AutAnalog SAR ADC1 |
|
ARM architecture |
on-chip |
Infineon PSE84 frontend of Arm Ethos-U NPU1 |
|
on-chip |
Infineon Serial Communication Blocks (SCB) node9 |
||
Audio |
on-chip |
Infineon PDM (Pulse Density Modulation) Controller1 |
|
Bluetooth |
on-board |
Connectivity chip that uses Infineon Bluetooth Host Controller Interface UART driver1 |
|
CAN |
on-chip |
Infineon CAN FD controller wrapper. 1 |
|
on-chip |
Infineon MCAN Driver2 |
||
Clock control |
on-chip |
Generic fixed-rate clock provider5 |
|
on-chip |
Generic fixed-rate clock provider20 |
||
on-chip |
|||
Comparator |
on-chip |
Infineon Low Power Comparator (LPComp) for CAT1 family1 |
|
on-chip |
Infineon LPComp channel node (child of infineon,lp-comp)2 |
||
Counter |
on-chip |
Infineon TCPWM counter32 |
|
DMA |
on-chip |
Infineon CAT1 DMA2 |
|
Flash controller |
on-board |
Infineon CAT1 QSPI flash controller1 |
|
GPIO & Headers |
on-chip |
||
I2C |
on-chip |
Infineon CAT1 I2C driver1 |
|
I2S |
on-chip |
Infineon I2S Controller2 |
|
Input |
on-board |
Group of GPIO-bound input keys1 |
|
Interrupt controller |
on-chip |
ARMv8-M NVIC (Nested Vectored Interrupt Controller)1 |
|
LED |
on-board |
Group of GPIO-controlled LEDs1 |
|
Multi-Function Device |
on-chip |
Infineon AutAnalog (Autonomous Analog) Multi-Function Device1 |
|
MTD |
on-chip |
Flash node2 |
|
on-board |
Fixed partitions of a flash (or other non-volatile storage) memory1 |
||
Pin control |
on-chip |
Infineon CAT1 Pinctrl Container1 |
|
PWM |
on-chip |
Infineon TCPWM PWM32 |
|
RTC |
on-chip |
Infineon CAT1 family RTC device1 |
|
SDHC |
on-chip |
||
Sensors |
on-board |
The BMI270 is an inertial measurement unit1 |
|
Serial controller |
on-chip |
Infineon CAT1 UART2 |
|
SRAM |
on-chip |
Generic on-chip SRAM1 |
|
Timer |
on-chip |
||
on-chip |
Infineon TCPWM Timer32 |
||
on-chip |
ARMv8-M System Tick1 |
||
USB |
on-chip |
Infineon USBHS1 |
|
Watchdog |
on-chip |
Infineon CAT1 Watchdog1 |
|
Wi-Fi |
on-board |
AIROC Wi-Fi Connectivity1 |
kit_pse84_eval/pse846gps2dbzc4a/m55 target
Type |
Location |
Description |
Compatible |
|---|---|---|---|
CPU |
on-chip |
ARM Cortex-M55 CPU1 |
|
ADC |
on-chip |
PSOC Edge AutAnalog SAR ADC1 |
|
ARM architecture |
on-chip |
Infineon PSE84 frontend of Arm Ethos-U NPU1 |
|
on-chip |
Infineon Serial Communication Blocks (SCB) node10 |
||
Audio |
on-chip |
Infineon PDM (Pulse Density Modulation) Controller1 |
|
CAN |
on-chip |
Infineon CAN FD controller wrapper. 1 |
|
on-chip |
Infineon MCAN Driver2 |
||
Clock control |
on-chip |
||
on-chip |
Generic fixed-rate clock provider20 |
||
on-chip |
|||
Comparator |
on-chip |
Infineon Low Power Comparator (LPComp) for CAT1 family1 |
|
on-chip |
Infineon LPComp channel node (child of infineon,lp-comp)2 |
||
Counter |
on-chip |
Infineon TCPWM counter32 |
|
DMA |
on-chip |
Infineon CAT1 DMA2 |
|
Flash controller |
on-board |
Infineon CAT1 QSPI flash controller1 |
|
GPIO & Headers |
on-chip |
||
I2C |
on-chip |
Infineon CAT1 I2C driver1 |
|
I2S |
on-chip |
Infineon I2S Controller2 |
|
Input |
on-board |
Group of GPIO-bound input keys1 |
|
Interrupt controller |
on-chip |
ARMv8.1-M NVIC (Nested Vectored Interrupt Controller)1 |
|
LED |
on-board |
Group of GPIO-controlled LEDs1 |
|
Multi-Function Device |
on-chip |
Infineon AutAnalog (Autonomous Analog) Multi-Function Device1 |
|
MTD |
on-chip |
Flash node2 |
|
on-board |
Fixed partitions of a flash (or other non-volatile storage) memory1 |
||
Pin control |
on-chip |
Infineon CAT1 Pinctrl Container1 |
|
PWM |
on-chip |
Infineon TCPWM PWM32 |
|
RTC |
on-chip |
Infineon CAT1 family RTC device1 |
|
SDHC |
on-chip |
Infineon CAT1 SDHC/SDIO controller2 |
|
Sensors |
on-board |
The BMI270 is an inertial measurement unit1 |
|
Serial controller |
on-chip |
Infineon CAT1 UART1 |
|
SRAM |
on-chip |
Generic on-chip SRAM1 |
|
Timer |
on-chip |
||
on-chip |
Infineon TCPWM Timer32 |
||
on-chip |
ARMv8.1-M System Tick1 |
||
USB |
on-chip |
Infineon USBHS1 |
|
Watchdog |
on-chip |
Infineon CAT1 Watchdog1 |
|
Wi-Fi |
on-board |
AIROC Wi-Fi Connectivity1 |
Connections and IOs
Please refer to kit_pse84_eval User Manual Website for more details.
Programming and Debugging
Note
BOOT SW on the board MUST be set to ON for any sample applications to work. On some boards this switch may be under the attached LCD screen.
The kit_pse84_eval board supports the runners and associated west commands listed below.
| flash | debug | debugserver | attach | rtt | |
|---|---|---|---|---|---|
| openocd | ✅ (default) | ✅ (default) | ✅ | ✅ | ✅ |
| probe-rs | ✅ | ✅ | ✅ | ✅ |
The KIT-PSE84-EVAL includes an onboard programmer/debugger (KitProg3) to provide debugging, flash programming, and serial communication over USB. Flash and debug commands use OpenOCD and require a custom Infineon OpenOCD version, that supports KitProg3, to be installed.
Please refer to the ModusToolbox™ software installation guide to install Infineon OpenOCD.
Flashing
Applications for the kit_pse84_eval/pse846gps2dbzc4a/m33 board target can be
built, flashed, and debugged in the usual way. See
Building an Application and Run an Application for more details on
building and running.
Applications for the kit_pse84_eval/pse846gps2dbzc4a/m55
board target need to be built using sysbuild to include the required application for the other core.
Enter the following command to compile hello_world for the CM55 core:
west build -b kit_pse84_eval/pse846gps2dbzc4a/m55 --sysbuild samples/hello_world -- -DOPENOCD=path/to/infineon/openocd/bin/openocd
west flash
Debugging
The path to the installed Infineon OpenOCD executable must be available to the west tool
commands. There are multiple ways of doing this. The example below uses a permanent CMake argument
to set the CMake variable OPENOCD.
# Run west config once to set permanent CMake argument west config build.cmake-args -- -DOPENOCD=path/to/infineon/openocd/bin/openocd.exe# Run west config once to set permanent CMake argument west config build.cmake-args -- -DOPENOCD=path/to/infineon/openocd/bin/openocd
west build -b kit_pse84_eval/pse846gps2dbzc4a/m33 samples/basic/blinky
west debug
Once the gdb console starts after executing the west debug command, you may now set breakpoints and perform other standard GDB debugging on the PSOC E84 CM33 core.
Secure Boot
The PSOC™ Edge E84 MCU includes an extended boot stage in ROM that, on reset, jumps to the first
application image. The destination is selected by the on-board BOOT SW:
BOOT SWOFF: the ROM extended boot jumps to the first application located in internal RRAM.BOOT SWON: the ROM extended boot jumps to the first application located in external flash.
In both cases the first application image must be in MCUboot image format, i.e. it must be preceded by an MCUboot image header (magic number, header size, vector table address, image size) and followed by the trailer with the hash/signature TLVs. Out of the box, the device is not provisioned for secure boot, so the ROM extended boot only checks the image format and hash; no cryptographic signature verification is performed against a provisioned key.
The MCUboot image format is produced automatically by the
soc/infineon/edge/pse84/pse84_metadata.cmake helper
pse84_add_metadata_secure_hex(), which invokes imgtool sign with the header address,
header size and slot size derived from the devicetree memory map. By default this helper does not
pass a signing key, which is sufficient for a non-provisioned device.
Enabling Secure Boot
To enable real signature verification by the ROM extended boot, the device must be reprovisioned. Follow sections 2.2.1, 2.2.2 and 2.2.3 of the PSOC™ Edge Security Getting Started Application Note to:
Generate (or import) the OEM signing key pair.
Provision the device with the corresponding public key and lifecycle transition.
Program the desired security counter / anti-rollback value.
After the device has been reprovisioned, the
pse84_add_metadata_secure_hex() function in
soc/infineon/edge/pse84/pse84_metadata.cmake must be updated so that imgtool sign
also receives the signing key and a security counter. The relevant additions are:
${PYTHON_EXECUTABLE} ${IMGTOOL} sign --version "0.0.0+0"
--header-size ${header_size} --erased-val 0xff --pad-header
--slot-size ${slot_size} --hex-addr ${header_addr}
--key <oem-private-key-file>
--security-counter <value>
${INPUT_FILE} ${OUTPUT_FILE}
Where <oem-private-key-file> is the path to the OEM private key file (e.g. a .pem
file) matching the public key provisioned into the device, and <value> is the security
counter assigned during provisioning. Without these additional parameters, images built for a
provisioned device will be rejected by the ROM extended boot.