STM32G0B1 Core Board
Overview
The WeAct Studio STM32G0B1 Core Board is breakout board for the STM32G0B1CBT6
Hardware
The board is equipped with a STM32G0B1CBT6 microcontroller and features a USB-C connector, a debug header, one LED, three buttons (reset, boot, user), and two 24-pin headers.
Supported Features
The weact_stm32g0b1_core board supports the hardware features listed below.
- on-chip / on-board
- Feature integrated in the SoC / present on the board.
- 2 / 2
-
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files. -
vnd,foo -
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.
weact_stm32g0b1_core/stm32g0b1xx target
Type |
Location |
Description |
Compatible |
|---|---|---|---|
CPU |
on-chip |
ARM Cortex-M0+ CPU1 |
|
ADC |
on-chip |
STM32 ADC1 |
|
CAN |
on-chip |
STM32 FDCAN CAN FD controller2 |
|
Clock control |
on-chip |
STM32F0/G0 RCC (Reset and Clock controller)1 |
|
on-chip |
STM32 HSE Clock1 |
||
on-chip |
STM32G0 HSI Clock1 |
||
on-chip |
STM32 LSE Clock1 |
||
on-chip |
Generic fixed-rate clock provider1 |
||
on-chip |
STM32G0 main PLL1 |
||
on-chip |
STM32 HSI48 Clock1 |
||
on-chip |
STM32 Microcontroller Clock Output (MCO)2 |
||
Counter |
on-chip |
STM32 counters10 |
|
DAC |
on-chip |
STM32 family DAC1 |
|
DMA |
on-chip |
STM32 DMA controller (V2)2 |
|
on-chip |
STM32 DMAMUX controller1 |
||
Flash controller |
on-chip |
STM32 Family flash controller1 |
|
GPIO & Headers |
on-chip |
STM32 GPIO Controller6 |
|
I2C |
on-chip |
STM32 I2C V2 controller3 |
|
Input |
on-board |
Group of GPIO-bound input keys1 |
|
Interrupt controller |
on-chip |
ARMv6-M NVIC (Nested Vectored Interrupt Controller) controller1 |
|
on-chip |
STM32G0 External Interrupt Controller1 |
||
LED |
on-board |
Group of GPIO-controlled LEDs1 |
|
Memory controller |
on-chip |
STM32 Battery Backed RAM1 |
|
MTD |
on-chip |
STM32 flash memory1 |
|
PHY |
on-chip |
This binding is to be used by all the usb transceivers which are built-in with USB IP1 |
|
Pin control |
on-chip |
STM32 Pin controller1 |
|
Power management |
on-chip |
STM32 power controller1 |
|
PWM |
on-chip |
STM32 PWM8 |
|
Reset controller |
on-chip |
STM32 Reset and Clock Control (RCC) Controller1 |
|
RTC |
on-chip |
STM32 RTC1 |
|
Sensors |
on-chip |
STM32 quadrature decoder4 |
|
on-chip |
STM32 family TEMP node for production calibrated sensors with two calibration temperatures1 |
||
on-chip |
STM32 VREF+1 |
||
on-chip |
STM32 VBAT1 |
||
Serial controller |
on-chip |
||
on-chip |
STM32 LPUART2 |
||
SMbus |
on-chip |
STM32 SMBus controller3 |
|
SPI |
on-chip |
STM32 SPI controller with embedded Rx and Tx FIFOs3 |
|
USB Type-C Port Controller |
on-chip |
STM32 USB Type-C / Power Delivery2 |
|
Timer |
on-chip |
ARMv6-M System Tick1 |
|
on-chip |
STM32 low-power timer (LPTIM)1 |
||
on-chip |
STM32 timers10 |
||
USB |
on-chip |
STM32 USB controller1 |
|
Watchdog |
on-chip |
STM32 watchdog1 |
|
on-chip |
STM32 system window watchdog1 |
System Clock
The STM32G0B1CBT6 PLL is driven by an external crystal oscillator (HSE) running at 8 MHz and configured to provide a system clock of 64 MHz.
Connections and IOs
Default Zephyr Peripheral Mapping:
UART_1 TX/RX: PA9/PA10
Programming and Debugging
The weact_stm32g0b1_core board supports the runners and associated west commands listed below.
| flash | debug | rtt | reset | attach | debugserver | |
|---|---|---|---|---|---|---|
| jlink | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ |
| openocd | ✅ | ✅ (default) | ✅ | ✅ | ✅ | |
| stm32cubeprogrammer | ✅ (default) |
The board can be debugged by installing the included header, and attaching an SWD debugger to the 3V3 (3.3V), G (GND), SCK, and DIO pins on that header.
Here is an example for the Blinky application.
# From the root of the zephyr repository
west build -b weact_stm32g0b1_core samples/basic/blinky
west flash