max32657evkit

Overview

The MAX32657 microcontroller (MCU) is an advanced system-on-chip (SoC) featuring an Arm® Cortex®-M33 core with single-precision floating point unit (FPU) with digital signal processing (DSP) instructions, large flash and SRAM memories, and the latest generation Bluetooth® 5.4 Low Energy (LE) radio. The nano-power modes increase battery life substantially.

The MAX32657 is qualified to operate at a temperature range of -20°C to +85°C. Bluetooth 5.4 LE radio supports Mesh, long-range (coded), and high-throughput modes. A cryptographic toolbox (CTB) provides advanced root of trust security features, including an Advanced Encryption Standard (AES) Engine, TRNG, and secure boot. TrustZone is also included in the M33 Core. Many high-speed interfaces are supported on the device, including multiple SPI, UART, and I3C/I2C serial interfaces. All interfaces support efficient DMA-driven transfers between peripheral and memory.

The Zephyr port is running on the MAX32657 MCU.

Hardware

  • MAX32657 MCU:

    • Arm Cortex-M33 CPU with TrustZone® and FPU

    • 1.2V to 1.6V Input Range for Integrated Boost DC-DC Converter

    • 50MHz Low Power Oscillator

    • External Crystal Support

      • 32MHz required for BLE

    • 1MB Internal Flash with ECC

    • 256kB Internal SRAM

    • 8kB Cache

    • 32.768kHz RTC external crystal

    • Typical Electrical Characteristics

      • ACTIVE: 50μA/MHz Arm Cortex-M33 Running Coremark (50MHz)

    • Bluetooth 5.4 LE Radio

      • Rx Sensitivity: -96dBm; Tx Power: +4.5dBm

      • 15mW Tx Power at 0dBm at 1.5Vin

      • 14mW Rx Power at 1.5Vin

      • Single-Ended Antenna Connection (50Ω)

      • Supports 802.15.4, and LE Audio

      • High-Throughput (2Mbps) Mode

      • Long-Range (125kbps and 500kbps) Modes

    • Optimal Peripheral Mix Provides Platform Scalability

      • 2 DMA Controllers (Secure and non-Secure)

      • One SPI Controller/Peripheral

      • One I2C/I3C

      • 1 Low-Power UART (LPUART)

      • Six 32-Bit Low Power Timers with PWM

      • 14 Configurable GPIO with Internal Pullup/Pulldown Resistors

    • Cryptographic Tool Box (CTB) for IP/Data Security

      • True Random Number Generator (TRNG)

      • AES-128/192/256

      • Unique ID

    • Secure Boot ROM

Supported Features

The max32657evkit board supports the hardware features listed below.

on-chip / on-board
Feature integrated in the SoC / present on the board.
2 / 2
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.
vnd,foo
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

max32657evkit/max32657 target

Type

Location

Description

Compatible

CPU

on-chip

ARM Cortex-M33 CPU1

arm,cortex-m33

Clock control

on-chip

MAX32 Global Control1

adi,max32-gcr

on-chip

Generic fixed-rate clock provider1 4

fixed-clock

Flash controller

on-chip

MAX32XXX flash controller1

adi,max32-flash-controller

GPIO & Headers

on-chip

MAX32 GPIO1

adi,max32-gpio

Input

on-board

Group of GPIO-bound input keys1

gpio-keys

Interrupt controller

on-chip

ARMv8-M NVIC (Nested Vectored Interrupt Controller)1

arm,v8m-nvic

LED

on-board

Group of GPIO-controlled LEDs1

gpio-leds

MMU / MPU

on-chip

ARMv8-M MPU (Memory Protection Unit)1

arm,armv8m-mpu

MTD

on-chip

Flash node1

soc-nv-flash

on-board

Fixed partitions of a flash (or other non-volatile storage) memory1

fixed-partitions

Pin control

on-chip

MAX32 Pin Controller1

adi,max32-pinctrl

RNG

on-chip

ADI MAX32XXX TRNG1

adi,max32-trng

Serial controller

on-chip

MAX32 UART1

adi,max32-uart

SRAM

on-chip

Generic on-chip SRAM5

mmio-sram

Timer

on-chip

ARMv8-M System Tick1

arm,armv8m-systick

Connections and IOs

Name

Name

Settings

Description

JP1

VLDO SEL

1-2

3-4

5-6

Open

Sets the LDO output used for system power according to the value of resistor R4.

Sets the LDO output used for system power to 1.2V.

Sets the LDO output used for system power to 1.5V.

Sets the LDO output used for system power to 1.6V.

JP2

VIN SEL

1-2

2-3

VIN Powered from LDO. (USB Type-C connector is board’s power source)

VIN Powered from Battery

JP3

VIN EN

1-2

Open

Connects the board’s power source to system power by connecting VIN to VSYS_IN.

Disconnects system power by disconnecting VIN from VSYS_IN.

JP4

VDD12 EN

1-2

Open

Connects system power to the MAX32657 by connecting VDD12 to VSYS_OUT.

Disconnects system power from the MAX32657 by disconnecting VDD12 from VSYS_OUT.

JP5

VTREF EN

1-2

Open

Connects a reference voltage to the OBD circuit.

Disconnects a reference voltage from the OBD circuit.

JP6

OBD VBUS EN

1-2

Open

Enables the OBD by connecting OBD_VBUS to VBUS.

Disables the OBD by disconnecting OBD_VBUS from VBUS.

J7

VSYS EN

1-2

Open

Connects system power to all peripherals by connecting VSYS to VSYS_OUT.

Disconnects system power to all peripherals by disconnecting VSYS from VSYS_OUT.

JP7

ACC VS EN

1-2

Open

Enables the accelerometer by connecting its supply voltage pin VS to VSYS.

Disables the accelerometer by disconnecting its supply voltage pin VS from VSYS.

JP8

ACC VDD EN

1-2

Open

Enables the accelerometer by connecting its VDDIO pin to VSYS.

Disables the accelerometer by disconnecting its VDDIO pin from VSYS.

JP9

ACC I2C EN

1-2

Open

Accelerometer SDA Pin is connected to MAX32657 I2C0_SDA.

Accelerometer SDA Pin is disconnected from MAX32657 I2C0_SDA.

JP10

ACC I2C EN

1-2

Open

Accelerometer SCL Pin is connected to MAX32657 I2C0_SCL.

Accelerometer SCL Pin is disconnected from MAX32657 I2C0_SCL.

JP11

BYP MAG SW

1-2

Open

Bypass Magnetic Switch.

Enables magnetic switch. The output of the switch is controlled by the AFE pin.

JP12

LOCK RSTN

1-2

Open

AFE Lock Pin is connected to MAX32657 RSTN pin.

AFE Lock Pin is disconnected from MAX32657 RSTN pin.

JP13

LATCH CTRL

1-2

2-3

Connects the AFE (LOCK) to the magnetic switch (OUTPUT LATCH CONTROL).

Connects the AFE (WAKE) to the magnetic switch (OUTPUT LATCH CONTROL).

JP14

AFE EN

1-2

Open

Enables the AFE (VBAT) by connecting it to VSYS.

Disables the AFE (VBAT) by disconnecting it from VSYS.

JP15

AFE SPI EN

1-2

3-4

5-6

7-8

9-10

11-12

Open All

AFE CSB is connected to MAX32657 SPI0_CS0.

AFE SDI is connected to MAX32657 SPI0_MOSI.

AFE SCLK is connected to MAX32657 SPI0_SCK.

AFE SDO is connected to MAX32657 SPI0_MISO.

AFE INTB is connected to MAX32657 P0.7.

AFE GPIO2 is connected to MAX32657 P0.8.

Disconnect SPI Interface from MAX32657.

JP16

I2C PU EN

1-2

Open

Enable SCL PU resistor.

Disable SCL PU resistor.

JP17

I2C PU EN

1-2

Open

Enable SDA PU resistor.

Disable SDA PU resistor.

JP18

OBD SWD EN

3-4

5-6

7-8

9-10

11-12

13-14

Open All

OBD SWDIO is connected to the MAX32657 SWDIO.

OBD SWCLK is connected to the MAX32657 SWCLK.

OBD JTAG TDO Enable Jumper (It’s not used on MAX32657).

OBD JTAG TDI Enable Jumper (It’s not used on MAX32657).

OBD RSTN is connected to the MAX32657 RSTN.

OBD JTAG TRST Enable Jumper (It’s not used on MAX32657).

Disable OBD SWD Connection from MAX32657.

JP19

OBD VCOM EN

3-4

5-6

7-8

9-10

Open

OBD VCOM TXD is connected VCOM EN RX Jumper.

OBD VCOM RXD is connected VCOM EN TX Jumper.

OBD VCOM CTS Enable Jumper (It’s not used on MAX32657).

OBD VCOM RTS Enable Jumper (It’s not used on MAX32657).

Disable OBD VCOM connection from MAX32657.

JP20

VCOM EN

1-2

Open

Connects OBD VCOM RXD to the MAX32657 UART0A_TX.

Disconnects OBD VCOM RXD from the MAX32657 UART0A_TX.

JP21

VCOM EN

1-2

Open

Connects OBD VCOM TXD to the MAX32657 UART0A_RX.

Disconnects OBD VCOM TXD from the MAX32657 UART0A_RX.

JP22

EXT SWD EN

1-2

Open

Connects EXT SWD Connector Data Signals to the MAX32657 SWDIO pin.

Disconnects EXT SWD Connector Data Signals from the MAX32657 SWDIO pin.

JP23

EXT SWD EN

1-2

Open

Connects EXT SWD Connector Clock Signals to the MAX32657 SWDCLK pin.

Disconnects EXT SWD Connector Clock Signals from the MAX32657 SWDCLK pin.

Zephyr board options

The MAX32657 microcontroller (MCU) is an advanced system-on-chip (SoC) featuring an ARM Cortex-M33 architecture that provides Trustzone technology which allow define secure and non-secure application.

The BOARD options are summarized below:

BOARD

Description

max32657evkit/max32657

For building Trust Zone Disabled firmware

BOARD: max32657evkit/max32657

Build the zephyr app for max32657evkit/max32657 board will generate secure firmware for zephyr. In this configuration 960KB of flash is used to store the code and 64KB is used for storage section. In this mode tf-m is off and secure mode flag is on :kconfig:option:CONFIG_TRUSTED_EXECUTION_SECURE=y and :kconfig:option:CONFIG_BUILD_WITH_TFM=n

Name

Address[Size]

Comment

slot0

0x1000000[960k]

Secure zephyr image

storage

0x10f0000[64k]

File system, persistent storage

Here are the instructions to build zephyr with a secure configuration, using Blinky sample:

# From the root of the zephyr repository
west build -b max32657evkit/max32657 samples/basic/blinky/

Programming and Debugging

The max32657evkit board supports the runners and associated west commands listed below.

flash debug rtt debugserver attach
jlink
openocd ✅ (default) ✅ (default)

Flashing

Here is an example for the Hello World application. This example uses the J-Link Debug Host Tools as default.

# From the root of the zephyr repository
west build -b max32657evkit/max32657 samples/hello_world
west flash

Open a serial terminal, reset the board (press the RESET button), and you should see the following message in the terminal:

***** Booting Zephyr OS build v4.1.0 *****
Hello World! max32657evkit/max32657

Debugging

Here is an example for the Hello World application. This example uses the J-Link Debug Host Tools as default.

# From the root of the zephyr repository
west build -b max32657evkit/max32657 samples/hello_world
west debug

Open a serial terminal, step through the application in your debugger, and you should see the following message in the terminal:

***** Booting Zephyr OS build v4.1.0 *****
Hello World! max32657evkit/max32657