SH-C31A
Overview
The DSD TECH SH-C31A is a non-isolated USB to CAN FD adapter derived from the CANable 2.0 open hardware design. Its schematic and board files are published by DSD TECH under the CERN-OHL-S-2.0 license (see SH-C31A hardware files [2]).
STM32G431C8T6 or STM32G431CBT6 MCU in LQFP48 package
SIT1051T CAN FD transceiver, up to 5 Mbit/s data phase bit rate
USB 2.0 full speed, USB Type-A plug
3.81 mm 3-pin screw terminal (CAN_H, CAN_L, GND)
120 Ohm termination switch
BOOT switch for entering the STM32 system bootloader
Red power LED and two green LEDs (TXD and RXD) controlled by the MCU
Five pin SWD header (H1)
More information about the board, including its user manual, component datasheets and vendor firmware, can be found in the SH-C31A repository [1]. The schematic is also available as a PDF (SH-C31A schematic [3]).
Hardware
The board uses the 64 KiB flash layout of the STM32G431C8, which also runs on boards fitted with the 128 KiB STM32G431CB.
The transceiver has no MCU-controlled mode pins: its silent mode input is tied to ground, and its I/O supply is switched on by an RC-delayed load switch after power-up.
More information about the STM32G431 can be found here:
Supported Features
The dsdtech_shc31a board supports the hardware features listed below.
- on-chip / on-board
- Feature integrated in the SoC / present on the board.
- 2 / 2
-
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files. -
vnd,foo -
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.
dsdtech_shc31a/stm32g431xx target
On-target memory for this board target: 32 KiB of RAM, 64 KiB of Flash.
Type |
Location |
Description |
Compatible |
|---|---|---|---|
CPU |
on-chip |
ARM Cortex-M4F CPU1 |
|
ADC |
on-chip |
STM32 ADC1 |
|
CAN |
on-chip |
STM32 FDCAN CAN FD controller1 |
|
Clock control |
on-chip |
STM32 RCC (Reset and Clock controller)1 |
|
on-chip |
STM32 HSE Clock1 |
||
on-chip |
|||
on-chip |
STM32 LSE Clock1 |
||
on-chip |
STM32G4 main PLL1 |
||
Comparator |
on-chip |
STM32G4 series Comparator4 |
|
Counter |
on-chip |
STM32 counters10 |
|
CRC |
on-chip |
STM32 CRC calculation unit1 |
|
DAC |
on-chip |
STM32 family DAC2 |
|
DMA |
on-chip |
STM32 DMA controller (V2)2 |
|
on-chip |
STM32 DMAMUX controller1 |
||
Flash controller |
on-chip |
STM32 Family flash controller1 |
|
GPIO & Headers |
on-chip |
STM32 GPIO Controller7 |
|
I2C |
on-chip |
STM32 I2C V2 controller3 |
|
I2S |
on-chip |
STM32 SAI Block controller1 |
|
Interrupt controller |
on-chip |
ARMv7-M NVIC (Nested Vectored Interrupt Controller)1 |
|
on-chip |
STM32 External Interrupt Controller1 |
||
LED |
on-board |
Group of GPIO-controlled LEDs1 |
|
MTD |
on-chip |
STM32 flash memory1 |
|
NVMEM |
on-chip |
Fixed layout for Non-Volatile memory1 |
|
OPAMP |
on-chip |
STM32G4 OPAMP3 |
|
OTP memory |
on-chip |
||
PHY |
on-chip |
This binding is to be used by all the usb transceivers which are built-in with USB IP1 |
|
Pin control |
on-chip |
STM32 Pin controller1 |
|
PWM |
on-chip |
STM32 PWM8 |
|
Reset controller |
on-chip |
STM32 Reset and Clock Control (RCC) Controller1 |
|
RNG |
on-chip |
STM32 Random Number Generator1 |
|
RTC |
on-chip |
STM32 RTC1 |
|
Sensors |
on-chip |
STM32 quadrature decoder5 |
|
on-chip |
STM32 family TEMP node for production calibrated sensors with two calibration temperatures1 |
||
on-chip |
STM32 VREF+1 |
||
on-chip |
STM32 VBAT1 |
||
Serial controller |
on-chip |
STM32 USART3 |
|
on-chip |
STM32 UART1 |
||
on-chip |
STM32 LPUART1 |
||
SMbus |
on-chip |
STM32 SMBus controller3 |
|
SPI |
on-chip |
STM32 SPI controller with embedded Rx and Tx FIFOs3 |
|
USB Type-C Port Controller |
on-chip |
STM32 USB Type-C / Power Delivery1 |
|
Timer |
on-chip |
ARMv7-M System Tick1 |
|
on-chip |
STM32 timers10 |
||
on-chip |
STM32 low-power timer (LPTIM)1 |
||
USB |
on-chip |
STM32 USB controller1 |
|
Watchdog |
on-chip |
STM32 system window watchdog1 |
|
on-chip |
STM32 watchdog1 |
Connections and IOs
Pin |
Function |
|---|---|
PB8 |
FDCAN1_RX, also BOOT0 |
PB9 |
FDCAN1_TX |
PA15 |
TXD LED (green, active low) |
PA0 |
RXD LED (green, active low) |
PA11 |
USB_DM |
PA12 |
USB_DP |
PA13 |
SWDIO (H1 pin 1) |
PA14 |
SWCLK (H1 pin 2) |
PG10 |
NRST (H1 pin 3) |
H1 pin 4 is +3.3 V and pin 5 is GND.
System Clock
The board has no crystal. The system clock is 160 MHz from the PLL, driven by HSI16. FDCAN1 is clocked from PLLQ at 80 MHz, and USB from HSI48.
BOOT0 and CAN RX
PB8 is both FDCAN1 RX and BOOT0. The transceiver drives it high whenever its I/O supply is on and the bus is recessive or unconnected. The RC delay on that supply holds PB8 low during a normal power-up, but not on a reset or after a short power dip, so with the factory option bytes such a reset can start the STM32 system bootloader instead of the application.
The nSWBOOT0 and nBOOT0 option bytes make the MCU ignore BOOT0 and always start from main
flash. The DSD TECH firmware v1.5 sets them, and they persist after other firmware is flashed;
the BOOT switch then has no effect. See the SH-C31A firmware notes [4] for how to restore it.
Programming and Debugging
The dsdtech_shc31a board supports the runners and associated west commands listed below.
| flash | debug | debugserver | attach | rtt | |
|---|---|---|---|---|---|
| dfu-util | ✅ (default) | ||||
| openocd | ✅ | ✅ (default) | ✅ | ✅ | ✅ |
| stm32cubeprogrammer | ✅ |
Flashing
The default runner is dfu-util, which programs the board through the STM32 system
bootloader over USB:
Unplug the adapter, set the BOOT switch, and plug it back in. The adapter enumerates as
0483:df11.Build and flash an application, for example Blinky:
west build -b dsdtech_shc31a samples/basic/blinky west flash
Set the BOOT switch back and replug the adapter to start the application.
Alternatively, connect an ST-LINK or another SWD probe to header H1 and flash with
west flash -r stm32cubeprogrammer or west flash -r openocd.
Debugging
Applications can be debugged through header H1 in the usual way:
# From the root of the zephyr repository
west build -b dsdtech_shc31a samples/basic/blinky
west debug