Lyra 24 P20RF DVK
Overview
The Lyra 24 P20RF Development Kit provides support for the Ezurio Lyra 24 P20RF Bluetooth Low Energy v5.4 module.
The module is based on the Silicon Laboratories BGM240PB32VNN module and includes an EFR32BG24 Arm Cortex-M33 CPU.
The Lyra 24 P20RF module incorporates the QFN package EFR32BG24 (1024kB Flash, 256kB RAM). The part features up to 26 configurable GPIOs and BLE Radio TX Power up to 20dBm.
The kit features a USB interface, an on-board SEGGER J-Link debugger, one user-LED and button, and support for hardware add-on boards via a mikroBUS socket and a Qwiic connector.
Note
You can find more information about the Lyra 24 family of modules in the Lyra 24 product brief and on the Lyra 24 website.
You can find more information about the Lyra 24 P20RF module in the Lyra 24 P datasheet.
You can find more information about the underlying BGM240PB32VNN module in the BGM240P datasheet.
You can find more information about the underlying EFR32BG24 SoC in the EFR32BG24 datasheet and EFR32BG24 reference manual.
Hardware
The Lyra 24 P20RF DVK has two crystal oscillators as follows.
High-frequency 39 MHz crystal oscillator (HFXO)
Low-frequency 32.768 kHz crystal oscillator (LFXO)
The high-frequency crystal oscillator is fitted within the Lyra 24 P20RF module.
The low-frequency crystal oscillator is fitted to the DVK and is external to the Lyra 24 P20RF module.
The module supports an external Bluetooth Low Energy antenna.
Full details of the DVK can be found in the Lyra 24 P DVK user guide and Lyra 24 P20RF DVK schematics.
Supported Features
The lyra_24_dvk_p20rf board supports the hardware features listed below.
- on-chip / on-board
- Feature integrated in the SoC / present on the board.
- 2 / 2
-
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files. -
vnd,foo -
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.
lyra_24_dvk_p20rf/bgm240pb32vnn target
Type |
Location |
Description |
Compatible |
|---|---|---|---|
CPU |
on-chip |
ARM Cortex-M33 CPU1 |
|
ADC |
on-chip |
Silicon Labs Series 2 IADC1 |
|
Bluetooth |
on-chip |
Silicon Labs Series 2 Bluetooth HCI1 |
|
Clock control |
on-chip |
Silicon Labs Series 2 CMU1 |
|
on-chip |
Silicon Labs Series 2 HFRCODPLL1 |
||
on-chip |
Generic fixed-rate clock provider3 |
||
on-chip |
Silicon Labs Series 2 LFXO1 |
||
on-chip |
Silicon Labs Series 2 LFRCO1 |
||
on-chip |
Silicon Labs Series 2 HFRCOEM231 |
||
on-chip |
Silicon Labs Series 2 HFXO1 |
||
on-chip |
Generic fixed factor clock provider21 |
||
Comparator |
on-chip |
Silicon Labs Series 2 ACMP2 |
|
Cryptographic accelerator |
on-chip |
Silicon Labs Series 2 SE Mailbox1 |
|
DAC |
on-chip |
Silicon Labs Series 2 VDAC 2 |
|
Debug |
on-chip |
Silicon Labs Packet Trace Interface1 |
|
on-chip |
ARMv8 instrumentation trace macrocell1 |
||
DMA |
on-chip |
Silicon Labs Series 2 LDMA1 |
|
Flash controller |
on-chip |
Silicon Labs Series 2 MSC1 |
|
GPIO & Headers |
on-chip |
Silicon Labs Series 2 GPIO Peripheral1 |
|
on-chip |
Silicon Labs Series 2 GPIO Port4 |
||
on-board |
GPIO pins exposed on Mikro BUS headers1 |
||
on-board |
STEMMA QT is a 4-pin JST-SH connector for I2C devices1 |
||
I2C |
on-chip |
||
Input |
on-board |
Group of GPIO-bound input keys1 |
|
Interrupt controller |
on-chip |
ARMv8-M NVIC (Nested Vectored Interrupt Controller)1 |
|
LED |
on-board |
Group of GPIO-controlled LEDs1 |
|
on-board |
Group of PWM-controlled LEDs1 |
||
MMU / MPU |
on-chip |
ARMv8-M MPU (Memory Protection Unit)1 |
|
MTD |
on-chip |
Flash node1 |
|
on-board |
Fixed partitions of a flash (or other non-volatile storage) memory1 |
||
Networking |
on-chip |
Silicon Labs Series 2 Radio Interface1 |
|
Pin control |
on-chip |
Silicon Labs Series 2 DBUS Pin Controller1 |
|
PWM |
on-chip |
||
on-chip |
Silicon Labs LETIMER PWM1 |
||
Regulator |
on-chip |
Silicon Labs Series 2 DC-DC converter1 |
|
Retained memory |
on-chip |
Silicon Labs Series 2 BURAM1 |
|
RTC |
on-chip |
Silicon Labs Series 2 SYSRTC1 |
|
Serial controller |
on-chip |
Silicon Labs Series 2 USART1 |
|
on-chip |
Silicon Labs Series 2 EUSART 1 |
||
SPI |
on-chip |
Silicon Labs Series 2 EUSART 1 |
|
SRAM |
on-chip |
Generic on-chip SRAM1 |
|
Timer |
on-chip |
ARMv8-M System Tick1 |
|
on-chip |
|||
on-chip |
Silicon Labs Series 2 BURTC1 |
||
on-chip |
Silicon Labs LETIMER1 |
||
Watchdog |
on-chip |
Connections and IOs
In the following table, the column Name contains Pin names. For example, PA2 means Pin number 2 on PORTA, as used in the board’s datasheets and manuals.
The Direction column indicates the pin direction from the module perspective, with I indicating Input, O Output, I/O for both and N/A where not applicable.
Name |
Function |
Usage |
Direction |
|---|---|---|---|
PA0 |
USART0_TX |
UART Console VCOM_TX |
O |
PA1 |
SWD_SWCLK |
JLink SWCLK |
I |
PA2 |
SWD_SWDIO |
JLink SWDIO |
I/O |
PA3 |
SWD_SWO |
JLink SWO |
O |
PA4 |
USART0_RTS |
UART Console VCOM_RTS |
O |
PA5 |
USART0_CTS |
UART Console VCOM_CTS |
I |
PA6 |
GPIO |
Breakout Connector GPIO |
I/O |
PA7 |
USART0_RX |
UART Console VCOM_RX |
I |
PA8 |
GPIO |
LED 0 |
O |
PB0 |
GPIO |
mikroBUS AN |
I |
PB1 |
EUSART0_TX |
mikroBUS TX |
O |
PB2 |
EUSART0_RX |
mikroBUS RX |
I |
PB3 |
GPIO |
mikroBUS INT |
I |
PB4 |
GPIO |
mikroBUS PWM |
O |
PC0 |
PTI_FRAME |
Packet Trace Interface FRAME |
O |
PC1 |
PTI_DATA |
Packet Trace Interface DATA |
O |
PC2 |
EUSART1_SCK |
mikroBUS SCK |
O |
PC3 |
GPIO |
mikroBUS CS |
O |
PC4 |
EUSART1_TX |
mikroBUS MOSI |
O |
PC5 |
EUSART1_RX |
mikroBUS MISO |
I |
PC6 |
GPIO |
mikroBUS RST |
O |
PC7 |
GPIO |
Button 0 |
I |
PD0 |
LFXO |
LFXO |
N/A |
PD1 |
LFXO |
LFXO |
N/A |
PD2 |
I2C0_SCL |
mikroBUS SCL / Qwiic SCL |
I/O |
PD3 |
I2C0_SDA |
mikroBUS SDA / Qwiic SDA |
I/O |
Note
Qwiic SCL is multipexed to the same I/O as MikroBUS SCL. MikroBUS I2C based boards can be used in conjunction with Qwiic boards by closing solder bridges SB5 and SB6.
Qwiic SDA is multipexed to the same I/O as MikroBUS SDA. MikroBUS I2C based boards can be used in conjunction with Qwiic boards by closing solder bridges SB9 and SB10.
Refer to the Lyra 24 P DVK user guide and Lyra 24 P20RF DVK schematics for further details.
System Clock
The Lyra 24 P20RF is configured to use the 39 MHz external oscillator on the board, and can operate at clock speeds of up to 78 MHz.
Serial Port
The Lyra 24 P20RF has two EUSARTs and one USART.
EUSART0 defaults to the mikroBUS UART.
EUSART1 defaults to the mikroBUS SPI port.
USART0 is connected to the board controller and is used for the console.
Programming and Debugging
Applications for the lyra_24_dvk_p20rf board can be built, flashed, and debugged in the usual way.
See Building an Application and Run an Application for more details on building and running.
Note
Before using the kit you should update the J-Link firmware in Simplicity Studio.
Bluetooth Low Energy
To use Bluetooth Low Energy functionality, run the command below to retrieve necessary binary blobs from the Silicon Labs HAL repository.
west blobs fetch hal_silabs
Then build the Zephyr kernel and a Bluetooth sample with the following command. The Observer sample application is used in this example.
# From the root of the zephyr repository
west build -b lyra_24_dvk_p20rf samples/bluetooth/observer