Lyra P DVK
Overview
The Lyra P Development Kit provides support for the Ezurio Lyra P Bluetooth Low Energy v5.3 module.
The module is based on the Silicon Laboratories BGM220PC22HNA module and includes an EFR32BG22 Arm Cortex-M33 CPU.
The Lyra P module incorporates the QFN package EFR32BG22 (512kB Flash, 32kB RAM). The part features up to 24 configurable GPIOs and BLE Radio TX Power up to 8dBm.
The kit features a USB interface, an on-board SEGGER J-Link debugger, one user-LED and button, and support for hardware add-on boards via a mikroBUS socket and a Qwiic connector.
Note
You can find more information about the Lyra family of modules in the Lyra product brief and on the Lyra website.
You can find more information about the Lyra P module in the Lyra P datasheet.
You can find more information about the underlying BGM220PC22HNA module in the BGM220P datasheet.
You can find more information about the underlying EFR32BG22 SoC in the EFR32BG22 datasheet and EFR32BG22 reference manual.
Hardware
The Lyra P DVK has two crystal oscillators as follows.
High-frequency 38.4 MHz crystal oscillator (HFXO)
Low-frequency 32.768 kHz crystal oscillator (LFXO)
Both crystal oscillators are fitted within the Lyra P module.
The module supports an on-chip Bluetooth Low Energy antenna.
Full details of the DVK can be found in the Lyra P DVK user guide and Lyra P DVK schematics.
Supported Features
The lyra_dvk_p board supports the hardware features listed below.
- on-chip / on-board
- Feature integrated in the SoC / present on the board.
- 2 / 2
-
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files. -
vnd,foo -
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.
lyra_dvk_p/bgm220pc22hna target
Type |
Location |
Description |
Compatible |
|---|---|---|---|
CPU |
on-chip |
ARM Cortex-M33 CPU1 |
|
ADC |
on-chip |
Silicon Labs Series 2 IADC1 |
|
Bluetooth |
on-chip |
Silicon Labs Series 2 Bluetooth HCI1 |
|
Clock control |
on-chip |
Silicon Labs Series 2 CMU1 |
|
on-chip |
Silicon Labs Series 2 HFXO1 |
||
on-chip |
Silicon Labs Series 2 HFRCODPLL1 |
||
on-chip |
Generic fixed-rate clock provider3 |
||
on-chip |
Silicon Labs Series 2 LFXO1 |
||
on-chip |
Silicon Labs Series 2 LFRCO1 |
||
on-chip |
Generic fixed factor clock provider18 |
||
Debug |
on-chip |
Silicon Labs Packet Trace Interface1 |
|
on-chip |
ARMv8 instrumentation trace macrocell1 |
||
DMA |
on-chip |
Silicon Labs Series 2 LDMA1 |
|
Flash controller |
on-chip |
Silicon Labs Series 2 MSC1 |
|
GPIO & Headers |
on-chip |
Silicon Labs Series 2 GPIO Peripheral1 |
|
on-chip |
Silicon Labs Series 2 GPIO Port4 |
||
on-board |
GPIO pins exposed on Mikro BUS headers1 |
||
on-board |
STEMMA QT is a 4-pin JST-SH connector for I2C devices1 |
||
I2C |
on-chip |
Silabs I2C node2 |
|
Input |
on-board |
Group of GPIO-bound input keys1 |
|
Interrupt controller |
on-chip |
ARMv8-M NVIC (Nested Vectored Interrupt Controller)1 |
|
LED |
on-board |
Group of GPIO-controlled LEDs1 |
|
on-board |
Group of PWM-controlled LEDs1 |
||
MMU / MPU |
on-chip |
ARMv8-M MPU (Memory Protection Unit)1 |
|
MTD |
on-chip |
Flash node1 |
|
on-board |
Fixed partitions of a flash (or other non-volatile storage) memory1 |
||
Networking |
on-chip |
Silicon Labs Series 2 Radio Interface1 |
|
Pin control |
on-chip |
Silicon Labs Series 2 DBUS Pin Controller1 |
|
PWM |
on-chip |
||
on-chip |
Silicon Labs LETIMER PWM1 |
||
Regulator |
on-chip |
Silicon Labs Series 2 DC-DC converter1 |
|
Retained memory |
on-chip |
Silicon Labs Series 2 BURAM1 |
|
RNG |
on-chip |
GECKO TRNG (True Random Number Generator)1 |
|
RTC |
on-chip |
Silicon Labs Series 2 RTCC1 |
|
Serial controller |
on-chip |
Silicon Labs Series 2 USART1 |
|
on-chip |
Silicon Labs Series 2 EUSART 1 |
||
SPI |
on-chip |
Silicon Labs Series 2 USART1 |
|
SRAM |
on-chip |
Generic on-chip SRAM1 |
|
Timer |
on-chip |
ARMv8-M System Tick1 |
|
on-chip |
|||
on-chip |
Silicon Labs Series 2 BURTC1 |
||
on-chip |
Silicon Labs LETIMER1 |
||
Watchdog |
on-chip |
Silicon Labs Series 1-2 WDOG1 |
Connections and IOs
In the following table, the column Name contains Pin names. For example, PA2 means Pin number 2 on PORTA, as used in the board’s datasheets and manuals.
The Direction column indicates the pin direction from the module perspective, with I indicating Input, O Output and I/O both.
Name |
Function |
Usage |
Direction |
|---|---|---|---|
PA0 |
USART1_TX |
UART Console VCOM_TX |
O |
PA1 |
SWD_SWCLK |
JLink SWCLK |
I |
PA2 |
SWD_SWDIO |
JLink SWDIO |
I/O |
PA3 |
SWD_SWO |
JLink SWO |
O |
PA4 |
USART1_RTS |
UART Console VCOM_RTS |
O |
PA5 |
USART1_CTS |
UART Console VCOM_CTS |
I |
PA6 |
GPIO |
Breakout Connector GPIO |
I/O |
PA7 |
USART1_RX |
UART Console VCOM_RX |
I |
PA8 |
GPIO |
LED 0 |
O |
PB0 |
GPIO |
mikroBUS AN |
I |
PB1 |
EUART0_TX |
mikroBUS TX |
O |
PB2 |
EUART0_RX |
mikroBUS RX |
I |
PB3 |
GPIO |
mikroBUS INT |
I |
PB4 |
GPIO |
mikroBUS PWM |
O |
PC0 |
PTI_FRAME |
Packet Trace Interface FRAME |
O |
PC1 |
PTI_DATA |
Packet Trace Interface DATA |
O |
PC2 |
USART0_SCK |
mikroBUS SCK |
O |
PC3 |
GPIO |
mikroBUS CS |
O |
PC4 |
USART0_TX |
mikroBUS MOSI |
O |
PC5 |
USART0_RX |
mikroBUS MISO |
I |
PC6 |
GPIO |
mikroBUS RST |
O |
PC7 |
GPIO |
Button 0 |
I |
PD2 |
I2C0_SCL |
mikroBUS SCL / Qwiic SCL |
I/O |
PD3 |
I2C0_SDA |
mikroBUS SDA / Qwiic SDA |
I/O |
Note
Switch SW1 is used to select I/O compatibility with legacy Bluetooth Xpress firmware. It should be set to the C_DEV/SWO position to enable support of the SWO pin and compatibility with the board definition files.
System Clock
The Lyra P is configured to use the 38.4 MHz external oscillator on the board, and can operate at clock speeds of up to 76.8 MHz.
Serial Port
The Lyra P has two USARTs and one EUART.
EUART0 defaults to the mikroBUS UART.
USART0 defaults to the mikroBUS SPI port.
USART1 is connected to the board controller and is used for the console.
Programming and Debugging
Applications for the lyra_dvk_p board can be built, flashed, and debugged in the usual way.
See Building an Application and Run an Application for more details on building and running.
Note
Before using the kit, you should update the J-Link firmware in Simplicity Studio.
Bluetooth Low Energy
To use Bluetooth Low Energy functionality, run the command below to retrieve necessary binary blobs from the Silicon Labs HAL repository.
west blobs fetch hal_silabs
Then build the Zephyr kernel and a Bluetooth sample with the following command. The Observer sample application is used in this example.
# From the root of the zephyr repository
west build -b lyra_dvk_p samples/bluetooth/observer