MAX32651EVKIT

Overview

The MAX32651 evaluation kit (EV kit) provides a platform for evaluating the capabilities of the MAX32651 ultra-low power memory-scalable microcontroller designed specifically for high performance battery powered applications.

The Zephyr port is running on the MAX32651 MCU.

Hardware

  • MAX32651 MCU:

    • Ultra Efficient Microcontroller for Battery-Powered Applications

      • 120MHz Arm Cortex-M4 with FPU

      • SmartDMA Provides Background Memory Transfers with Programmable Data Processing

      • 120MHz High-Speed and 50MHz Low-Power Oscillators

      • 7.3728MHz Low Power Oscillators

      • 32.768kHz and RTC Clock (Requires External Crystal)

      • 8kHz, Always-on, Ultra-Low-Power Oscillator

      • 3MB Internal Flash, 1MB Internal SRAM

      • 104µW/MHz Executing from Cache at 1.1V

      • Five Low-Power Modes: Active, Sleep, Background, Deep-Sleep, and Backup

      • 1.8V and 3.3V I/O with No Level Translators

      • Programming and Debugging

    • Scalable Cached External Memory Interfaces

      • 120MB/s HyperBus/Xccela DDR Interface

      • SPIXF/SPIXR for External Flash/RAM Expansion

      • 240Mbps SDHC/eMMC/SDIO/microSD Interface

    • Optimal Peripheral Mix Provides Platform Scalability

      • 16-Channel DMA

      • Three SPI Master (60MHz)/Slave (48MHz)

      • One QuadSPI Master (60MHz)/Slave (48MHz)

      • Up to Three 4Mbaud UARTs with Flow Control

      • Two 1MHz I2C Master/Slave

      • I2S Slave

      • Four-Channel, 7.8ksps, 10-bit Delta-Sigma ADC

      • USB 2.0 Hi-Speed Device Interface with PHY

      • 16 Pulse Train Generators

      • Six 32-bit Timers with 8mA Hi-Drive

      • 1-Wire® Master

    • Trust Protection Unit (TPU) for IP/Data and Security

      • Modular Arithmetic Accelerator (MAA), True Random Number Generator (TRNG)

      • Secure Nonvolatile Key Storage, SHA-256, AES-128/192/256

      • Memory Decryption Integrity Unit, Secure Boot ROM

  • External devices connected to the MAX32651EVKIT:

    • 3.5in 320 x 240 Color TFT Display

    • 64MB HyperRAM

    • 64MB XIP Flash

    • 1MB XIP RAM

    • USB 2.0 Micro B

    • Two General-Purpose LEDs and Two General-Purpose Pushbutton Switches

Supported Features

The max32651evkit board supports the hardware features listed below.

on-chip / on-board
Feature integrated in the SoC / present on the board.
2 / 2
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.
vnd,foo
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

max32651evkit/max32651 target

On-target memory for this board target: 256 KiB of RAM, 3 MiB of Flash.

Type

Location

Description

Compatible

CPU

on-chip

ARM Cortex-M4F CPU1

arm,cortex-m4f

on-chip

MAX32 RV32 core1

adi,max32-rv32

ADC

on-chip

ADI MAX32 ADC 10-Bits1

adi,max32-adc-10b

Clock control

on-chip

Generic fixed-rate clock provider23

fixed-clock

on-chip

MAX32 Global Control1

adi,max32-gcr

Counter

on-chip

ADI MAX32 counter6

adi,max32-counter

on-chip

ADI MAX32 compatible Counter RTC1

adi,max32-rtc-counter

DMA

on-chip

ADI MAX32 DMA1

adi,max32-dma

Flash controller

on-chip

MAX32XXX flash controller1

adi,max32-flash-controller

GPIO & Headers

on-chip

MAX32 GPIO4

adi,max32-gpio

I2C

on-chip

ADI MAX32 I2C11

adi,max32-i2c

Input

on-board

Group of GPIO-bound input keys1

gpio-keys

Interrupt controller

on-chip

ARMv7-M NVIC (Nested Vectored Interrupt Controller)1

arm,v7m-nvic

LED

on-board

Group of GPIO-controlled LEDs1

gpio-leds

Mailbox

on-chip

ADI MAX32 SEMA Mailbox1

adi,mbox-max32-sema

Memory controller

on-chip

MAX32 HyperBus (HPB) Memory Controller Interface1

adi,max32-hpb

MTD

on-chip

Flash node1

soc-nv-flash

Pin control

on-chip

MAX32 Pin Controller1

adi,max32-pinctrl

PWM

on-chip

ADI MAX32 PWM6

adi,max32-pwm

RNG

on-chip

ADI MAX32XXX TRNG1

adi,max32-trng

Serial controller

on-chip

MAX32 UART12

adi,max32-uart

SPI

on-chip

ADI MAX32 SPI13

adi,max32-spi

SRAM

on-chip

Generic on-chip SRAM7

mmio-sram

Timer

on-chip

ADI MAX32 timer6

adi,max32-timer

on-chip

ARMv7-M System Tick1

arm,armv7m-systick

USB

on-chip

ADI MAX32 USBHS1

adi,max32-usbhs

Watchdog

on-chip

MAX32XXX watchdog11

adi,max32-watchdog

Signing the Firmware

Signing the firmware image feature is implemented to Zephyr for secure SoCs. This feature requires ADI Secure Boot Tools to be installed on the host machine.

To sign the firmware image, user needs to enable CONFIG_SOC_FAMILY_MAX32_SECURE_SOC_SIGNING and specify the path to the private key using CONFIG_SOC_FAMILY_MAX32_SECURE_SOC_KEY_PATH. Once these are configured, firmware signing is performed automatically in the background during the west build process.

Example west build command:

# From the root of the zephyr repository
west build -b max32651evkit -o -DCONFIG_SOC_FAMILY_MAX32_SECURE_SOC_SIGNING=y -o -DCONFIG_SOC_FAMILY_MAX32_SECURE_SOC_KEY_PATH="C:/analog/SecureBootTools/devices/MAX32651/keys/maximtestcrk.key" samples/hello_world

The signing process will check the ADI Secure Boot Tools and use this private key to generate signed HEX and BIN files in the build directory. The signed output files are automatically set as the default files for flashing, so the west flash command will use the signed images by default.

Programming and Debugging

The max32651evkit board supports the runners and associated west commands listed below.

flash debug attach debugserver rtt reset
jlink
openocd ✅ (default) ✅ (default)

Flashing

The MAX32651 MCU can be flashed by connecting an external debug probe to the SWD port. SWD debug can be accessed through the Cortex 10-pin connector, J3. Logic levels are fixed to VDDIO (1.8V).

Once the debug probe is connected to your host computer, then you can simply run the west flash command to write a firmware image into flash.

Note

This board uses OpenOCD as the default debug interface. You can also use a Segger J-Link with Segger’s native tooling by overriding the runner, appending --runner jlink to your west command(s). The J-Link should be connected to the standard 2*5 pin debug connector (J3) using an appropriate adapter board and cable

Debugging

Please refer to the Flashing section and run the west debug command instead of west flash.

References