SixG301 +10 dBm, 4 MB Flash Radio Board

Overview

The SixG301 +10 dBm, 4 MB Flash Radio Board is designed to support the development of Wireless IoT devices based on 2.4 GHz wireless protocols including BLE, Bluetooth Mesh, Matter, OpenThread and Zigbee.

The radio board plugs into the Wireless Pro Kit Mainboard and is supported in Zephyr as one of several Radio Boards.

Hardware

SIMG301M104LIL SoC
CPU core: ARM Cortex®-M33 with FPU
CPU clock speed: 150 MHz
Flash memory: 4096 kB in-package QSPI NOR Flash
RAM: 512 kB
Transmit power: up to +10 dBm
Operation frequency: 2.4 GHz
High Frequency Crystal Oscillator (38.4 MHz)

Supported Features

The sixg301_rb4407a board supports the hardware features listed below.

on-chip / on-board: Feature integrated in the SoC / present on the board.
2 / 2: Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.
vnd,foo: Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

`sixg301_rb4407a/simg301m104lil` target

On-target memory for this board target: 512 KiB of RAM, 3652 KiB of Flash.

Type	Location	Description	Compatible
CPU	on-chip	ARM Cortex-M33 CPU1	`arm,cortex-m33`
ADC	on-chip	Silicon Labs Series 3 ADC1	`silabs,series3-adc`
Bluetooth	on-chip	Silicon Labs Series 2 Bluetooth HCI1	`silabs,bt-hci-efr32`
Clock control	on-chip	Silicon Labs Series 2 HFRCOEM231	`silabs,series2-hfrcoem23`
	on-chip	Silicon Labs Series 2 HFXO1	`silabs,hfxo`
	on-chip	Silicon Labs SOCPLL1	`silabs,socpll`
	on-chip	Silicon Labs Series 2 CMU1	`silabs,series-clock`
	on-chip	Silicon Labs CMU CLKOUT1	`silabs,series-clock-output`
	on-chip	Silicon Labs Series 2 HFRCODPLL1	`silabs,series2-hfrcodpll`
	on-chip	Generic fixed-rate clock provider3	`fixed-clock`
	on-chip	Silicon Labs Series 2 LFXO1	`silabs,series2-lfxo`
	on-chip	Silicon Labs Series 2 LFRCO1	`silabs,series2-lfrco`
	on-chip	Generic fixed factor clock provider24	`fixed-factor-clock`
Comparator	on-chip	Silicon Labs Series 2 ACMP2	`silabs,acmp`
Counter	on-chip	Silicon Labs TIMER Counter4	`silabs,timer-counter`
	on-chip	Silicon Labs Series 2 BURTC1	`silabs,burtc-counter`
	on-chip	Silicon Labs PROTIMER counter1	`silabs,protimer`
CRC	on-chip	Silabs General Purpose CRC1	`silabs,gpcrc`
Cryptographic accelerator	on-chip	Silicon Labs Series 3 Crypto1 1	`silabs,series3-crypto`
Cryptographic accelerator	on-chip	Silicon Labs Series 2 SE Mailbox1	`silabs,gecko-semailbox`
Debug	on-chip	Silicon Labs Packet Trace Interface1	`silabs,pti`
Debug	on-chip	ARMv8 instrumentation trace macrocell1	`arm,armv8m-itm`
Display	on-board	Sharp LS0XX memory display controller1	`sharp,ls0xx`
DMA	on-chip	Silicon Labs Series 2 LDMA1	`silabs,ldma`
Flash controller	on-chip	Silicon Labs Series 3 EXTMEM1	`silabs,series3-extmem`
GPIO & Headers	on-chip	Silicon Labs Series 2 GPIO Peripheral1	`silabs,gpio`
	on-chip	Silicon Labs Series 2 GPIO Port4	`silabs,gpio-port`
	on-board	Silicon Labs Kit Expansion Header1	`silabs,exp-header`
I2C	on-chip	Silicon Labs Series 2 I2C1 2	`silabs,i2c`
Input	on-board	Group of GPIO-bound input keys1	`gpio-keys`
Interrupt controller	on-chip	ARMv8-M NVIC (Nested Vectored Interrupt Controller)1	`arm,v8m-nvic`
LED	on-board	Group of GPIO-controlled LEDs1	`gpio-leds`
LED	on-board	Group of PWM-controlled LEDs1	`pwm-leds`
MMU / MPU	on-chip	ARMv8-M MPU (Memory Protection Unit)1	`arm,armv8m-mpu`
MTD	on-chip	Flash node1	`soc-nv-flash`
Networking	on-chip	Silicon Labs Series 2 Radio Interface1	`silabs,series2-radio`
Pin control	on-chip	Silicon Labs Series 2 DBUS Pin Controller1	`silabs,dbus-pinctrl`
PWM	on-chip	Silicon Labs LETIMER PWM1	`silabs,letimer-pwm`
PWM	on-chip	Silicon Labs TIMER PWM1 3	`silabs,timer-pwm`
Regulator	on-board	Fixed voltage regulators1	`regulator-fixed`
Retained memory	on-chip	Silicon Labs Series 2 BURAM1	`silabs,buram`
RTC	on-chip	Silicon Labs Series 2 SYSRTC1	`silabs,sysrtc`
Sensors	on-board	Silicon Labs Si7006/13/20/21 RHT Sensor1	`silabs,si7006`
Serial controller	on-chip	Silicon Labs Series 2 EUSART 1	`silabs,eusart-uart`
SPI	on-chip	Silicon Labs Series 2 EUSART 1 1	`silabs,eusart-spi`
SRAM	on-chip	Generic on-chip SRAM1	`mmio-sram`
Timer	on-chip	ARMv8-M System Tick1	`arm,armv8m-systick`
	on-chip	Silicon Labs LETIMER1	`silabs,series2-letimer`
	on-chip	Silicon Labs TIMER1 3	`silabs,series2-timer`
Watchdog	on-chip	Silicon Labs Series 3 WDOG1 1	`silabs,wdog`

System Clock

The SiMG301 SoC is configured to use the SOCPLL oscillator at 150 MHz as the system clock.

Serial Port

The SiMG301 SoC has three EUSARTs. EUSART0 is connected to the board controller and is used for the console.

Programming and Debugging

The sixg301_rb4407a board supports the runners and associated west commands listed below.

	flash	debug
silabs_commander	✅ (default)

Memory Configuration

The SiMG301 flash controller divides memory into 8 code regions and one data region. Code regions are made up of 32 kB erasable pages used to store firmware images. The data region is made up of 4 kB erasable pages used to store data.

Code regions may be configured with no protection, EXiP (encrypted execute-in-place) or AXiP (authenticated execute-in-place). When AXiP is enabled, an additional 4 bytes of MAC (message authentication code) are stored for every 32 bytes of ciphertext. This means that 36 kB of physical memory is consumed for every 32 kB of firmware. The MAC is not directly accessible, but must be accounted for when calculating code and data region sizes. See Configuring Code Regions for more information.

In Zephyr, the partition configuration in Devicetree must align with the logical memory map as configured on the device. Since the apparent logical size of memory varies depending on how many flash pages are used for AXiP code regions, the total flash size must also be configured to match the device configuration.

Configuring the Board for Development

When AXiP (authenticated execute-in-place) or EXiP (encrypted execute-in-place) are enabled, it is recommended to configure development devices to not regenerate the IV (initial value) for flash encryption every time an image is flashed, to limit the use of OTP (one-time-programmable memory) bits.

This can be done by executing the following command using Simplicity Commander:

commander security transitiontodevelopment

See Considerations for Development Devices for more details. For more information about OTP bit consumption, see SE Anti-Rollback OTP Bit Consumption for Series 3.

Flashing

Connect the BRD4002A mainboard with a mounted BRD4407A radio board to your host computer using the USB-C port.

Build and flash the Hello World application.

# From the root of the zephyr repository
west build -b sixg301_rb4407a samples/hello_world
west flash

Open a serial terminal (minicom, putty, etc.) with the following settings:

Speed: 115200
Data: 8 bits
Parity: None
Stop bits: 1

Reset the board and you should see the following message in the terminal:

Hello World! sixg301_rb4407a

Bluetooth

To use Bluetooth functionality, run the command below to retrieve necessary binary blobs from the Silicon Labs HAL repository.

west blobs fetch hal_silabs

Then build the Zephyr kernel and a Bluetooth sample with the following command. The Observer sample application is used in this example.

# From the root of the zephyr repository
west build -b sixg301_rb4407a samples/bluetooth/observer
west flash