RZ/V2L SMARC Evaluation Board Kit

Board Overview

RZ/V2L SMARC Evaluation Board Kit

Name:

rzv2l_smarc

Vendor:

Renesas Electronics Corporation

Architecture:

arm

SoC:

r9a07g054l23gbg

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Overview

The Renesas RZ/V2L SMARC Evaluation Board Kit (RZ/V2L-EVKIT) consists of a SMARC v2.1 module board and a carrier board.

• Device: RZ/V2L R9A07G054L23GBG

  • Cortex-A55 Dual, Cortex-M33

  • BGA551pin, 15mmSq body, 0.5mm pitch

• SMARC v2.1 Module Board Functions

  • DDR4 SDRAM: 2GB x 1pc

  • QSPI flash memory: 512Mb x 1pc

  • eMMC memory: 64GB x 1pc

  • The microSD card slot is implemented and used as an eSD for boot

  • 5-output clock oscillator 5P35023 implemented

  • PMIC power supply RAA215300 implemented

• Carrier Board Functions

  • The FFC/FPC connector is mounted as standard for connection to high-speed serial interface for camera module.

  • The Micro-HDMI connector via DSI/HDMI conversion module is mounted as standard for connection to high-speed serial interface for digital video module.

  • The Micro-AB receptacle (ch0: USB2.0 OTG) and A receptacle (ch1: USB2.0 Host) are respectively mounted as standard for connection to USB interface.

  • The RJ45 connector is mounted as standard for software development and evaluation using Ethernet.

  • The audio codec is mounted as standard for advance development of audio system. The audio jack is implemented for connection to audio interface.

  • The CAN connector is implemented for connection to CAN-Bus interface.

  • The Micro-AB receptacles are implemented for connection to asynchronous serial port interface.

  • The microSD card slot and two sockets for PMOD are implemented as an interface for RZ/V2L peripheral functions.

  • For power supply, a mounted USB Type-C receptacle supports the USB PD standard.

• MIPI Camera Module

  • MIPI Camera Module (MIPI CSI) is included. Image recognition processing can be used with images input with MIPI camera.

Hardware

The Renesas RZ/V2L MPU documentation can be found at RZ/V2L Group Website [1]

RZ/V2L block diagram (Credit: Renesas Electronics Corporation)

Detailed hardware features for the board can be found at RZV2L-EVKIT Website [2]

Supported Features

The rzv2l_smarc board supports the hardware features listed below.

on-chip / on-board

Feature integrated in the SoC / present on the board.

2 / 2

Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.

vnd,foo

Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

rzv2l_smarc

/

r9a07g054l23gbg/cm33

rzv2l_smarc/r9a07g054l23gbg/cm33 target

Type	Location	Description	Compatible
CPU	on-chip	ARM Cortex-M33 CPU1	arm,cortex-m33
GPIO & Headers	on-chip	Renesas RZ GPIO Interrupt1	renesas,rz-gpio-int
	on-chip	Renesas RZ GPIO controller49	renesas,rz-gpio
Interrupt controller	on-chip	ARMv8-M NVIC (Nested Vectored Interrupt Controller)1	arm,v8m-nvic
MMU / MPU	on-chip	ARMv8-M MPU (Memory Protection Unit)1	arm,armv8m-mpu
Pin control	on-chip	Renesas RZ/V pin controller1	renesas,rzv-pinctrl
Serial controller	on-chip	Renesas RZ SCIF UART controller1 4	renesas,rz-scif-uart
SRAM	on-board	Generic on-chip SRAM description1	mmio-sram
Timer	on-chip	ARMv8-M System Tick1	arm,armv8m-systick

Programming and Debugging

Applications for the rzv2l_smarc board can be built in the usual way as documented in Building an Application.

Console

The UART port for Cortex-M33 System Core can be accessed by connecting Pmod USBUART to the upper side of PMOD 1.

Debugging

It is possible to load and execute a Zephyr application binary on this board on the Cortex-M33 System Core from the internal SRAM, using JLink debugger (J-Link Debug Host Tools).

Here is an example for building and debugging with the Hello World application.

# From the root of the zephyr repository
west build -b rzv2l_smarc/r9a07g054l23gbg/cm33 samples/hello_world
west debug

Flashing

RZ/V2L-EVKIT is designed to start different systems on different cores. It uses Yocto as the build system to build Linux system and boot loaders to run Zephyr on Cortex-M33 with u-boot. The minimal steps are described below.

1. Follow ‘’2.2 Building Images’’ of SMARC EVK of RZ/V2L Linux Start-up Guide [3] to prepare the build environment.

2. At step (4), follow step ‘’2. Download Multi-OS Package’’ and ‘’3. Add the layer for Multi-OS Package’’ of ‘’3.2 OpenAMP related stuff Integration for RZ/V2L’’ of RZ/V2L Quick Start Guide for RZ/V Multi-OS Package [4] to add the layer for Multi-OS Package.

$ cd ~/rzv_vlp_<pkg ver>
$ unzip <Multi-OS Dir>/r01an7254ej0300-rzv-multi-os-pkg.zip
$ tar zxvf r01an7254ej0300-rzv-multi-os-pkg/meta-rz-features_multi-os_v3.0.0.tar.gz
$ bitbake-layers add-layer ../meta-rz-features/meta-rz-multi-os/meta-rzv2l

3. Start the build:

$ MACHINE=smarc-rzv2l bitbake core-image-minimal

The below necessary artifacts will be located in the build/tmp/deploy/images

Artifacts	File name
Boot loader	bl2_bp-smarc-rzv2l_pmic.srec fip-smarc-rzv2l_pmic.srec
Flash Writer	Flash_Writer_SCIF_RZV2L_SMARC_PMIC_DDR4_2GB_1PCS.mot

4. Follow ‘’4.2 Startup Procedure’’ of SMARC EVK of RZ/V2L Linux Start-up Guide [3] for power supply and board setting at SCIF download (SW11[1:4] = OFF, ON, OFF, ON) and (SW1[1:2] = ON, OFF)

5. Follow ‘’4.3 Download Flash Writer to RAM’’ of SMARC EVK of RZ/V2L Linux Start-up Guide [3] to download Flash Writer to RAM

6. Follow ‘’4.4 Write the Bootloader’’ of SMARC EVK of RZ/V2L Linux Start-up Guide [3] to write the boot loader to the target board by using Flash Writer.

7. Follow ‘’4.5 Change Back to Normal Boot Mode’’ with switch setting (SW11[1:4] = OFF, OFF, OFF, ON) and (SW1[1:2] = ON, OFF)

8. Follow ‘’3. Preparing the SD Card’’ of SMARC EVK of RZ/V2L Linux Start-up Guide [3] to write files to the microSD Card

9. Copy zephyr.bin file to microSD card

10. Follow “4.3.2 CM33 Sample Program Invocation with u-boot” from the beginning to step 4 of RZ/V2L Quick Start Guide for RZ/V Multi-OS Package [4]

11. Execute the commands stated below on the console to start zephyr application with CM33 core. Here, ‘’N’’ stands for the partition number in which you stored zephyr.bin file.

Hit any key to stop autoboot: 2
=> dcache off
=> mmc dev 1
=> fatload mmc 1:N 0x00010000 zephyr.bin
=> fatload mmc 1:N 0x40010000 zephyr.bin
=> cm33 start_normal 0x00010000 0x40010000
=> dcache on

References

[1]

https://www.renesas.com/en/products/microcontrollers-microprocessors/rz-mpus/rzv2l-general-purpose-microprocessor-equipped-renesas-original-ai-accelerator-drp-ai-12ghz-dual-core-arm

[2]

https://www.renesas.com/en/products/microcontrollers-microprocessors/rz-mpus/rzv2l-evkit-smarc-som-evaluation-kit-rzv2l-mpu-ai-accelerator

[3] (1,2,3,4,5)

https://www.renesas.com/en/document/gde/smarc-evk-rzv2l-linux-start-guide-rev104

[4] (1,2)

https://www.renesas.com/en/document/apn/rzv2l-quick-start-guide-rzv-multi-os-package-v300