RA8D1 Evaluation Kit

Overview

The EK-RA8D1 is an Evaluation Kit for Renesas RA8D1 MCU Group which are the industry’s first 32-bit graphics-enabled MCUs based on the Arm Cortex-M85 (CM85) core, delivering breakthrough performance of over 3000 Coremark points at 480 MHz and superior graphics capabilities that enable high-resolution displays and Vision AI applications.

The key features of the EK-RA8D1 board are categorized in three groups as follow:

MCU Native Pin Access

  • 480MHz Arm Cortex-M85 based RA8D1 MCU in 224 pins, BGA package

  • Native pin acces througgh 2 x 50-pin, and 2 x 40-pin male headers

  • MCU current measurement points for precision current consumption measurement

  • Multiple clock sources - RA8D1 MCU oscillator and sub-clock oscillator crystals, providing precision 20.000MHz and 32,768 Hz refeence clocks. Additional low precision clocks are available internal to the RA8D1 MCU

System Control and Ecosystem Access

  • USB Full Speed Host and Device (micro-AB connector)

  • Four 5V input sources

    • USB (Debug, Full Speed, High Speed)

    • External power supply (using surface mount clamp test points and power input vias)

  • Three Debug modes

    • Debug on-board (SWD)

    • Debug in (ETM, SWD and JTAG)

    • Debug out (SWD)

  • User LEDs and buttons

    • Three User LEDs (red, blue, green)

    • Power LED (white) indicating availability of regulated power

    • Debug LED (yellow) indicating the debug connection

    • Two User buttons

    • One Reset button

  • Five most popular ecosystems expansions

    • Two Seeed Grove system (I2C/I3C) connectors

    • One SparkFun Qwiic connector

    • Two Digilent Pmod (SPI, UART and I2C/I3C) connectors

    • Arduino (Uno R3) connector

    • MikroElektronika mikroBUS connector

  • MCU boot configuration jumper

Special Feature Access

  • Ethernet (RJ45 RMII interface)

  • USB High Speed Host and Device (micro-AB connector)

  • 512 Mb (64 MB) External Octo-SPI Flash (present in the MCU Native Pin Access area of the EK-RA8D1 board)

  • CAN FD (3-pin header)

Hardware

Detailed Hardware features for the RA8D1 MCU group can be found at RA8D1 Group User’s Manual Hardware

RA8D1 MCU group feature

RA8D1 Block diagram (Credit: Renesas Electronics Corporation)

Detailed Hardware features for the EK-RA8D1 MCU can be found at EK-RA8D1 - User’s Manual

Supported Features

The ek_ra8d1 board supports the hardware features listed below.

on-chip / on-board
Feature integrated in the SoC / present on the board.
2 / 2
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.
vnd,foo
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

ek_ra8d1/r7fa8d1bhecbd target

Type

Location

Description

Compatible

CPU

on-chip

ARM Cortex-M85 CPU1

arm,cortex-m85

ADC

on-chip

Renesas RA ADC node1 1

renesas,ra-adc

CAN

on-chip

Renesas RA CANFD controller global1

renesas,ra-canfd-global

on-chip

Renesas RA CANFD controller1 1

renesas,ra-canfd

Clock control

on-chip

Renesas RA Clock Generation Circuit external clock configuration1

renesas,ra-cgc-external-clock

on-chip

Generic fixed-rate clock provider3

fixed-clock

on-chip

Renesas RA Sub-Clock1

renesas,ra-cgc-subclk

on-chip

Renesas RA Clock Generation Circuit PLL Clock1 1

renesas,ra-cgc-pll

on-chip

Renesas RA Clock Generation Circuit PLL Clock out line3 3

renesas,ra-cgc-pll-out

on-chip

Renesas RA Clock Control node pclk block1

renesas,ra-cgc-pclk-block

on-chip

Renesas RA Clock Control Peripheral Clock13 5

renesas,ra-cgc-pclk

on-chip

Renesas RA External Bus Clock1

renesas,ra-cgc-busclk

Comparator

on-chip

Renesas RA ACMPHS (High-Speed Analog COMParator) Global1

renesas,ra-acmphs-global

on-chip

Renesas RA ACMPHS (High-Speed Analog COMParator) Controller2

renesas,ra-acmphs

Counter

on-chip

Renesas RA AGT as Counter2

renesas,ra-agt-counter

DAC

on-chip

Renesas RA DAC Controller Global1

renesas,ra-dac-global

on-chip

Renesas RA DAC Controller1 1

renesas,ra-dac

Display

on-chip

Renesas Graphic LCD controller1

renesas,ra-glcdc

Ethernet

on-chip

Renesas RA Ethernet1

renesas,ra-ethernet

on-board

Generic MII PHY1

ethernet-phy

Flash controller

on-chip

Renesas RA family flash high-performance controller1

renesas,ra-flash-hp-controller

GPIO & Headers

on-chip

Renesas RA GPIO I/O Port6 6

renesas,ra-gpio-ioport

on-board

GPIO pins exposed on Renesas MIPI lcd display headers1

renesas,ra-gpio-mipi-header

I2C

on-chip

Renesas RA I2C Master controller2

renesas,ra-iic

on-chip

Renesas RA SCI-B I2C controller6

renesas,ra-i2c-sci-b

Input

on-board

Group of GPIO-bound input keys1

gpio-keys

Interrupt controller

on-chip

ARMv8.1-M NVIC (Nested Vectored Interrupt Controller)1

arm,v8.1m-nvic

LED

on-board

Group of GPIO-controlled LEDs1

gpio-leds

MDIO

on-chip

Renesas RA External MDIO controller1

renesas,ra-mdio

Memory controller

on-chip

Renesas RA SDRAM controller1

renesas,ra-sdram

MIPI-DSI

on-chip

Renesas RA MIPI DSI host1

renesas,ra-mipi-dsi

Miscellaneous

on-chip

Renesas RA SCI controller1 5

renesas,ra-sci

on-chip

Renesas RA AGT2

renesas,ra-agt

on-chip

Renesas RA External Interrupt2 14

renesas,ra-external-interrupt

MMU / MPU

on-chip

ARMv8.1-M MPU (Memory Protection Unit)1

arm,armv8.1m-mpu

MTD

on-chip

Flash memory binding of Renesas RA family2

renesas,ra-nv-flash

on-board

Fixed partitions of a flash (or other non-volatile storage) memory1

fixed-partitions

PHY

on-chip

This binding is to be used by all the usb transceivers which are built-in with USB IP1

usb-nop-xceiv

on-chip

Renesas RA USBHS internal PHY controller1

renesas,ra-usbphyc

Pin control

on-chip

The Renesas RA pin controller is a node responsible for controlling pin function selection and pin properties, such as routing a SCI0 RXD to P6101

renesas,ra-pinctrl-pfs

PWM

on-chip

Renesas RA Pulse Width Modulation1 13

renesas,ra-pwm

RNG

on-chip

Renesas RA RSIP-E51A TRNG1

renesas,ra-rsip-e51a-trng

SDHC

on-chip

Renesas RA SDHC2

renesas,ra-sdhc

Serial controller

on-chip

Renesas RA SCI_B UART controller1 5

renesas,ra8-uart-sci-b

SPI

on-chip

Renesas RA8 SPI_B controller1 1

renesas,ra8-spi-b

SRAM

on-chip

Generic on-chip SRAM description1

mmio-sram

Timer

on-chip

ARMv8.1-M System Tick1

arm,armv8.1m-systick

USB

on-chip

Renesas RA USB full-speed controller1

renesas,ra-usbfs

on-chip

Renesas RA USB device controller1 1

renesas,ra-udc

on-chip

Renesas RA USB high-speed controller1

renesas,ra-usbhs

Watchdog

on-chip

Renesas RA Watchdog (wdt)1

renesas,ra-wdt

Note

  • For using Ethernet on RA8D1 board please set switch SW1 as following configuration:

    SW1-1 PMOD1

    SW1-2 TRACE

    SW1-3 CAMERA

    SW1-4 ETHA

    SW1-5 ETHB

    SW1-6 GLCD

    SW1-7 SDRAM

    SW1-8 I3C

    OFF

    OFF

    OFF

    OFF

    ON

    OFF

    OFF

    OFF

  • For using SDHC channel 1 on RA8D1 board please set switch SW1 as following configuration:

    SW1-1 PMOD1

    SW1-2 TRACE

    SW1-3 CAMERA

    SW1-4 ETHA

    SW1-5 ETHB

    SW1-6 GLCD

    SW1-7 SDRAM

    SW1-8 I3C

    OFF

    OFF

    OFF

    OFF

    OFF

    OFF

    OFF

    OFF

Warning

Do not enable SW1-4 and SW1-5 together

Programming and Debugging

Applications for the ek_ra8d1 board configuration can be built, flashed, and debugged in the usual way. See Building an Application and Run an Application for more details on building and running.

Note: Only support from SDK v0.16.6 in which GCC for Cortex Arm-M85 was available. To build for EK-RA8M1 user need to get and install GNU Arm Embedded toolchain from https://github.com/zephyrproject-rtos/sdk-ng/releases/tag/v0.16.6

Flashing

Program can be flashed to EK-RA8D1 via the on-board SEGGER J-Link debugger. SEGGER J-link’s drivers are available at https://www.segger.com/downloads/jlink/

To flash the program to board

  1. Connect to J-Link OB via USB port to host PC

  2. Make sure J-Link OB jumper is in default configuration as describe in EK-RA8D1 - User’s Manual

  3. Execute west command

    west flash -r jlink
    

Debugging

You can use Segger Ozone (Segger Ozone Download) for a visual debug interface

Once downloaded and installed, open Segger Ozone and configure the debug project like so:

  • Target Device: R7FA8D1BH

  • Target Interface: SWD

  • Target Interface Speed: 4 MHz

  • Host Interface: USB

  • Program File: <path/to/your/build/zephyr.elf>

Note: It’s verified that debug is OK on Segger Ozone v3.30d so please use this or later version of Segger Ozone

References