RA8D1 Evaluation Kit
Overview
The EK-RA8D1 is an Evaluation Kit for Renesas RA8D1 MCU Group which are the industry’s first 32-bit graphics-enabled MCUs based on the Arm Cortex-M85 (CM85) core, delivering breakthrough performance of over 3000 Coremark points at 480 MHz and superior graphics capabilities that enable high-resolution displays and Vision AI applications.
The key features of the EK-RA8D1 board are categorized in three groups as follow:
MCU Native Pin Access
480MHz Arm Cortex-M85 based RA8D1 MCU in 224 pins, BGA package
Native pin acces througgh 2 x 50-pin, and 2 x 40-pin male headers
MCU current measurement points for precision current consumption measurement
Multiple clock sources - RA8D1 MCU oscillator and sub-clock oscillator crystals, providing precision 20.000MHz and 32,768 Hz refeence clocks. Additional low precision clocks are available internal to the RA8D1 MCU
System Control and Ecosystem Access
USB Full Speed Host and Device (micro-AB connector)
Four 5V input sources
USB (Debug, Full Speed, High Speed)
External power supply (using surface mount clamp test points and power input vias)
Three Debug modes
Debug on-board (SWD)
Debug in (ETM, SWD and JTAG)
Debug out (SWD)
User LEDs and buttons
Three User LEDs (red, blue, green)
Power LED (white) indicating availability of regulated power
Debug LED (yellow) indicating the debug connection
Two User buttons
One Reset button
Five most popular ecosystems expansions
Two Seeed Grove system (I2C/I3C) connectors
One SparkFun Qwiic connector
Two Digilent Pmod (SPI, UART and I2C/I3C) connectors
Arduino (Uno R3) connector
MikroElektronika mikroBUS connector
MCU boot configuration jumper
Special Feature Access
Ethernet (RJ45 RMII interface)
USB High Speed Host and Device (micro-AB connector)
512 Mb (64 MB) External Octo-SPI Flash (present in the MCU Native Pin Access area of the EK-RA8D1 board)
CAN FD (3-pin header)
Hardware
Detailed Hardware features for the RA8D1 MCU group can be found at RA8D1 Group User’s Manual Hardware

RA8D1 Block diagram (Credit: Renesas Electronics Corporation)
Detailed Hardware features for the EK-RA8D1 MCU can be found at EK-RA8D1 - User’s Manual
Supported Features
The ek_ra8d1
board supports the hardware features listed below.
- on-chip / on-board
- Feature integrated in the SoC / present on the board.
- 2 / 2
-
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files. -
vnd,foo
-
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.
ek_ra8d1/r7fa8d1bhecbd
target
Type |
Location |
Description |
Compatible |
---|---|---|---|
CPU |
on-chip |
ARM Cortex-M85 CPU1 |
|
ADC |
on-chip |
||
CAN |
on-chip |
Renesas RA CANFD controller global1 |
|
on-chip |
|||
Clock control |
on-chip |
Renesas RA Clock Generation Circuit external clock configuration1 |
|
on-chip |
Generic fixed-rate clock provider3 |
||
on-chip |
Renesas RA Sub-Clock1 |
||
on-chip |
|||
on-chip |
|||
on-chip |
Renesas RA Clock Control node pclk block1 |
||
on-chip |
|||
on-chip |
Renesas RA External Bus Clock1 |
||
Comparator |
on-chip |
Renesas RA ACMPHS (High-Speed Analog COMParator) Global1 |
|
on-chip |
Renesas RA ACMPHS (High-Speed Analog COMParator) Controller2 |
||
Counter |
on-chip |
Renesas RA AGT as Counter2 |
|
DAC |
on-chip |
Renesas RA DAC Controller Global1 |
|
on-chip |
|||
Display |
on-chip |
Renesas Graphic LCD controller1 |
|
Ethernet |
on-chip |
Renesas RA Ethernet1 |
|
on-board |
Generic MII PHY1 |
||
Flash controller |
on-chip |
Renesas RA family flash high-performance controller1 |
|
GPIO & Headers |
on-chip |
||
on-board |
GPIO pins exposed on Renesas MIPI lcd display headers1 |
||
I2C |
on-chip |
Renesas RA I2C Master controller2 |
|
on-chip |
Renesas RA SCI-B I2C controller6 |
||
Input |
on-board |
Group of GPIO-bound input keys1 |
|
Interrupt controller |
on-chip |
ARMv8.1-M NVIC (Nested Vectored Interrupt Controller)1 |
|
LED |
on-board |
Group of GPIO-controlled LEDs1 |
|
MDIO |
on-chip |
Renesas RA External MDIO controller1 |
|
Memory controller |
on-chip |
Renesas RA SDRAM controller1 |
|
MIPI-DSI |
on-chip |
Renesas RA MIPI DSI host1 |
|
Miscellaneous |
on-chip |
||
on-chip |
Renesas RA AGT2 |
||
on-chip |
|||
MMU / MPU |
on-chip |
ARMv8.1-M MPU (Memory Protection Unit)1 |
|
MTD |
on-chip |
Flash memory binding of Renesas RA family2 |
|
on-board |
Fixed partitions of a flash (or other non-volatile storage) memory1 |
||
PHY |
on-chip |
This binding is to be used by all the usb transceivers which are built-in with USB IP1 |
|
on-chip |
Renesas RA USBHS internal PHY controller1 |
||
Pin control |
on-chip |
The Renesas RA pin controller is a node responsible for controlling pin function selection and pin properties, such as routing a SCI0 RXD to P6101 |
|
PWM |
on-chip |
||
RNG |
on-chip |
Renesas RA RSIP-E51A TRNG1 |
|
SDHC |
on-chip |
Renesas RA SDHC2 |
|
Serial controller |
on-chip |
||
SPI |
on-chip |
||
SRAM |
on-chip |
Generic on-chip SRAM description1 |
|
Timer |
on-chip |
ARMv8.1-M System Tick1 |
|
USB |
on-chip |
Renesas RA USB full-speed controller1 |
|
on-chip |
|||
on-chip |
Renesas RA USB high-speed controller1 |
||
Watchdog |
on-chip |
Renesas RA Watchdog (wdt)1 |
Note
For using Ethernet on RA8D1 board please set switch SW1 as following configuration:
SW1-1 PMOD1
SW1-2 TRACE
SW1-3 CAMERA
SW1-4 ETHA
SW1-5 ETHB
SW1-6 GLCD
SW1-7 SDRAM
SW1-8 I3C
OFF
OFF
OFF
OFF
ON
OFF
OFF
OFF
For using SDHC channel 1 on RA8D1 board please set switch SW1 as following configuration:
SW1-1 PMOD1
SW1-2 TRACE
SW1-3 CAMERA
SW1-4 ETHA
SW1-5 ETHB
SW1-6 GLCD
SW1-7 SDRAM
SW1-8 I3C
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
Warning
Do not enable SW1-4 and SW1-5 together
Programming and Debugging
Applications for the ek_ra8d1
board configuration can be
built, flashed, and debugged in the usual way. See
Building an Application and Run an Application for more details on
building and running.
Note: Only support from SDK v0.16.6 in which GCC for Cortex Arm-M85 was available. To build for EK-RA8M1 user need to get and install GNU Arm Embedded toolchain from https://github.com/zephyrproject-rtos/sdk-ng/releases/tag/v0.16.6
Flashing
Program can be flashed to EK-RA8D1 via the on-board SEGGER J-Link debugger. SEGGER J-link’s drivers are available at https://www.segger.com/downloads/jlink/
To flash the program to board
Connect to J-Link OB via USB port to host PC
Make sure J-Link OB jumper is in default configuration as describe in EK-RA8D1 - User’s Manual
Execute west command
west flash -r jlink
Debugging
You can use Segger Ozone (Segger Ozone Download) for a visual debug interface
Once downloaded and installed, open Segger Ozone and configure the debug project like so:
Target Device: R7FA8D1BH
Target Interface: SWD
Target Interface Speed: 4 MHz
Host Interface: USB
Program File: <path/to/your/build/zephyr.elf>
Note: It’s verified that debug is OK on Segger Ozone v3.30d so please use this or later version of Segger Ozone