RA6E1 Fast Prototyping Board

Overview

The Renesas RA6E1 group uses the high-performance Arm® Cortex®-M33 core with TrustZone®. The RA6E1 is suitable for entry IoT applications requiring streamlined feature and connectivity integration including Ethernet, and unprecedented performance with 790.75 CoreMark, which are 3.95CoreMark / Mhz.

The key features of the FPB-RA6E1 board are categorized in three groups as follow:

MCU Native Pin Access

  • 200MHz Arm Cortex-M33 based RA6E1 MCU in 100 pins, LQFP package

  • Native pin access through 2 x 50-pin male headers (not fitted)

  • MCU current measurement point for precision current consumption measurement

  • Multiple clock sources - Low-precision (~1%) clocks are available internal to the RA MCU. RA MCU oscillator and sub-clock oscillator crystals, providing precision 24.000 MHz (not fitted) and 32,768 Hz reference clocks are also available

System Control and Ecosystem Access

  • Two 5V input sources

    • USB (Debug, Full Speed, High Speed)

    • External power supply (using 2-pin header) (not fitted)

  • Built-in SEGGER J-Link Emulator On-Board programmer/debugger (SWD)

  • User LEDs and buttons

    • Two User LEDs (green)

    • Power LED (green) (not fitted) indicating availability of regulated power

    • Debug/power LED (yellow) indicating power and the debug connection

    • One User button

    • One Reset button

  • Two popular ecosystems expansions

    • Two Digilent PmodTM (SPI, UART) connectors (not fitted)

    • Arduino (Uno R3) connector

  • MCU boot configuration jumper

Hardware

Detailed hardware features for the RA6E1 MCU group can be found at RA6E1 Group User’s Manual Hardware

RA6E1 MCU group feature

RA6E1 Block diagram (Credit: Renesas Electronics Corporation)

Detailed hardware features for the FPB-RA6E1 MCU can be found at FPB-RA6E1 - User’s Manual

Supported Features

The fpb_ra6e1 board supports the hardware features listed below.

on-chip / on-board
Feature integrated in the SoC / present on the board.
2 / 2
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.
vnd,foo
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

fpb_ra6e1/r7fa6e10f2cfp target

Type

Location

Description

Compatible

CPU

on-chip

ARM Cortex-M33 CPU1

arm,cortex-m33

ADC

on-chip

Renesas RA ADC node1

renesas,ra-adc

Clock control

on-chip

Renesas RA Clock Generation Circuit external clock configuration1

renesas,ra-cgc-external-clock

on-chip

Generic fixed-rate clock provider3

fixed-clock

on-chip

Renesas RA Sub-Clock1

renesas,ra-cgc-subclk

on-chip

Renesas RA Clock Generation Circuit PLL Clock1 1

renesas,ra-cgc-pll

on-chip

Renesas RA Clock Control node pclk block1

renesas,ra-cgc-pclk-block

on-chip

Renesas RA Clock Control Peripheral Clock6 2

renesas,ra-cgc-pclk

Counter

on-chip

Renesas RA AGT as Counter6

renesas,ra-agt-counter

DAC

on-chip

Renesas RA DAC Controller Global1

renesas,ra-dac-global

on-chip

Renesas RA DAC Controller1

renesas,ra-dac

Flash controller

on-chip

Renesas RA family flash high-performance controller1

renesas,ra-flash-hp-controller

GPIO & Headers

on-chip

Renesas RA GPIO I/O Port2 6

renesas,ra-gpio-ioport

I2C

on-chip

Renesas RA I2C Master controller1 1

renesas,ra-iic

Input

on-board

Group of GPIO-bound input keys1

gpio-keys

Interrupt controller

on-chip

ARMv8-M NVIC (Nested Vectored Interrupt Controller)1

arm,v8m-nvic

LED

on-board

Group of GPIO-controlled LEDs1

gpio-leds

Miscellaneous

on-chip

Renesas RA SCI controller1 5

renesas,ra-sci

on-chip

Renesas RA AGT6

renesas,ra-agt

on-chip

Renesas RA External Interrupt1 15

renesas,ra-external-interrupt

MMU / MPU

on-chip

ARMv8-M MPU (Memory Protection Unit)1

arm,armv8m-mpu

MTD

on-chip

Flash memory binding of Renesas RA family2

renesas,ra-nv-flash

on-board

Fixed partitions of a flash (or other non-volatile storage) memory1

fixed-partitions

PHY

on-chip

This binding is to be used by all the usb transceivers which are built-in with USB IP1

usb-nop-xceiv

Pin control

on-chip

The Renesas RA pin controller is a node responsible for controlling pin function selection and pin properties, such as routing a SCI0 RXD to P6101

renesas,ra-pinctrl-pfs

PWM

on-chip

Renesas RA Pulse Width Modulation1 5

renesas,ra-pwm

RNG

on-chip

Renesas RA SCE9 TRNG1

renesas,ra-sce9-rng

Serial controller

on-chip

Renesas RA SCI UART controller1 5

renesas,ra-sci-uart

SPI

on-chip

Renesas RA SPI controller1 1

renesas,ra-spi

SRAM

on-chip

Generic on-chip SRAM description1

mmio-sram

Timer

on-chip

ARMv8-M System Tick1

arm,armv8m-systick

USB

on-chip

Renesas RA USB full-speed controller1

renesas,ra-usbfs

on-chip

Renesas RA USB device controller1

renesas,ra-udc

Watchdog

on-chip

Renesas RA Watchdog (wdt)1

renesas,ra-wdt

Programming and Debugging

Applications for the fpb_ra6e1 board target configuration can be built, flashed, and debugged in the usual way. See Building an Application and Run an Application for more details on building and running.

Flashing

Program can be flashed to FPB-RA6E1 via the on-board SEGGER J-Link debugger. SEGGER J-link’s drivers are available at https://www.segger.com/downloads/jlink/

To flash the program to board

  1. Connect to J-Link OB via USB port to host PC

  2. Make sure J-Link OB jumper is in default configuration as describe in FPB-RA6E1 - User’s Manual

  3. Execute west command

    west flash -r jlink
    

Debugging

You can use Segger Ozone (Segger Ozone Download) for a visual debug interface

Once downloaded and installed, open Segger Ozone and configure the debug project like so:

  • Target Device: R7FA6E10F

  • Target Interface: SWD

  • Target Interface Speed: 4 MHz

  • Host Interface: USB

  • Program File: <path/to/your/build/zephyr.elf>

Note: It’s verified that we can debug OK on Segger Ozone v3.30d so please use this or later version of Segger Ozone

References