PSOC™ 4000T

Overview

The CY8CPROTO-040T is a prototyping kit based on the PSOC™ 4000T family, featuring a PSOC™ 4000T (CY8C4046LQI-T452) microcontroller with an Arm® Cortex®-M0+ core running at up to 48 MHz.

Key features include 64 KB flash, 8 KB SRAM, CAPSENSE™ low-power sensing, and an onboard KitProg3 programmer/debugger with USB Micro-B connectivity.

Hardware

  • SoC: PSOC™ 4000T (CY8C4046LQI-T452)

  • CPU: Arm® Cortex®-M0+ at 48 MHz

  • Flash: 64 KB

  • SRAM: 8 KB

  • Peripherals: TCPWM, SCB (UART/SPI/I2C), MSCLP (CAPSENSE™)

  • Debug: Onboard KitProg3 (SWD + UART bridge)

  • Power: USB powered via Micro-B connector (5V operating)

For more information about the PSOC™ 4000T and CY8CPROTO-040T:

Kit Contents

  • PSOC™ 4000T Prototyping Kit board

  • USB-A to Micro-B cable

  • Quick start guide

Supported Features

The cy8cproto_040t board supports the hardware features listed below.

on-chip / on-board
Feature integrated in the SoC / present on the board.
2 / 2
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.
vnd,foo
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

cy8cproto_040t/cy8c4046lqi_t452 target

On-target memory for this board target: 8 KiB of RAM, 64 KiB of Flash.

Type

Location

Description

Compatible

CPU

on-chip

ARM Cortex-M0+ CPU1

arm,cortex-m0+

ARM architecture

on-chip

Infineon Serial Communication Blocks (SCB) node1

infineon,scb

Clock control

on-chip

Generic fixed-rate clock provider21

infineon,fixed-clock

on-chip

Generic fixed-rate clock provider1

infineon,fixed-factor-clock

on-chip

infineon peripheral divider13

infineon,peri-div

Counter

on-chip

Infineon TCPWM counter2

infineon,tcpwm-counter

Flash controller

on-chip

Infineon CAT1 flash controller1

infineon,flash-controller

GPIO & Headers

on-chip

Infineon GPIO Port32

infineon,gpio

on-chip

Infineon Shared GPIO Set1

infineon,shared-gpio

Interrupt controller

on-chip

ARMv6-M NVIC (Nested Vectored Interrupt Controller) controller1

arm,v6m-nvic

LED

on-board

Group of GPIO-controlled LEDs1

gpio-leds

MTD

on-chip

Flash node1

soc-nv-flash

Pin control

on-chip

Infineon CAT1 Pinctrl Container1

infineon,pinctrl

PWM

on-chip

Infineon TCPWM PWM2

infineon,tcpwm-pwm

Serial controller

on-chip

Infineon CAT1 UART1

infineon,uart

SRAM

on-chip

Generic on-chip SRAM1

mmio-sram

Timer

on-chip

ARMv6-M System Tick1

arm,armv6m-systick

on-chip

Infineon TCPWM Timer2

infineon,tcpwm

Watchdog

on-chip

Infineon CAT1 Watchdog1

infineon,watchdog

Connections and IOs

LEDs

Name

GPIO Pin

LED3

P1.0 (active high)

LED1

P3.0 (active low)

Push Buttons

The board does not define a button node by default: pin P3.0 is exposed as led1 (see above) since it shares its routing with SW4 through header J6. Samples that need SW4 as an input, such as Button, provide a devicetree overlay that repurposes this pin as a sw0 button instead.

Note

USER LED1 and USER button SW4 share the same routing through the selection header J6. Because they share the same selection path, only the function selected on J6 (LED1 or SW4) is usable at a time.

Default Zephyr Peripheral Mapping

Pin

Function

Usage

P2.3

SCB0 UART TX

Console TX

P2.2

SCB0 UART RX

Console RX

P1.0

GPIO

LED3 (subject to J6)

P3.0

GPIO

LED1 / Button SW4 (J6)

Note

Verify the UART pin mapping above against the official board schematic before relying on it for production use.

Note

Switch SW2 must be set to the UART position to use the console over the KitProg3 USB-UART bridge. SW2 also selects the I2C pin routing when SCB0 is instead configured for I2C.

System Clock

The PSOC™ 4000T uses the Internal Main Oscillator (IMO) as the default system clock source. The clock path is:

  • IMO (Internal Main Oscillator): 48 MHz

  • CLK_HF: 48 MHz (system clock)

Serial Port

The PSOC™ 4000T has two SCB (Serial Communication Block) interfaces that can each be configured as UART, SPI, or I2C. The Zephyr console output is assigned to SCB0 (uart0), which is routed through the KitProg3 USB-UART bridge.

To use the UART console, set switch SW2 to the UART position. Without this, the KitProg3 USB-UART bridge is not connected to the SCB0 pins and the console will not be available.

Default communication settings are 115200 8N1.

Building

Here is an example for the Hello World application.

# From the root of the zephyr repository
west build -b cy8cproto_040t samples/hello_world

Programming and Debugging

The cy8cproto_040t board supports the runners and associated west commands listed below.

flash debug attach debugserver rtt
openocd ✅ (default) ✅ (default) ✅ ✅ ✅

The CY8CPROTO-040T includes an onboard programmer/debugger (KitProg3) which can be used to program and debug the PSOC™ 4000T Cortex-M0+ core.

Infineon OpenOCD Installation

The ModusToolbox™ Programming Tools package includes Infineon OpenOCD. Alternatively, a standalone installation can be done by downloading the Infineon OpenOCD release for your system and extracting the files to a location of your choice.

Note

Linux requires device access rights to be set up for KitProg3. This is handled automatically by the ModusToolbox™ Programming Tools installation. When doing a standalone OpenOCD installation, this can be done manually by executing the script openocd/udev_rules/install_rules.sh.

Configuring a Console

Connect a USB cable from your PC to the KitProg3 USB Micro-B connector on the CY8CPROTO-040T. Use the serial terminal of your choice (minicom, PuTTY, etc.) with the following settings:

  • Speed: 115200

  • Data: 8 bits

  • Parity: None

  • Stop bits: 1

Flashing

One time, set the Infineon OpenOCD path:

west config build.cmake-args -- "-DOPENOCD=path/to/infineon/openocd/bin/openocd.exe"

Build and flash the application:

west build -b cy8cproto_040t -p always samples/hello_world
west flash

You should see the following message on the console:

*** Booting Zephyr OS build vX.Y.Z ***
Hello World! cy8cproto_040t

Debugging

# From the root of the zephyr repository
west build -b cy8cproto_040t samples/hello_world
west debug

Once the GDB console starts, you may set breakpoints and perform standard GDB debugging on the PSOC™ 4000T Cortex-M0+ core.

References