FRDM-MCXW70
Overview
The FRDM-MCXW70 is a compact and scalable development board for rapid prototyping of the MCX W70 wireless MCU. It offers easy evaluation of the MCX W70’s multiprotocol wireless support for Bluetooth LE, Zigbee, Thread and Matter. The board includes an on-board MCU-Link debugger, industry standard headers for easy access to the MCU’s I/Os, an accelerometer, a light sensor and external SPI flash memory.
The MCX W70x family features a 96 MHz Arm® Cortex®-M33 core coupled with a multiprotocol radio subsystem supporting Matter, Thread, Zigbee and Bluetooth LE. The independent radio subsystem, with a dedicated core and memory, offloads the main CPU, preserving it for the primary application and allowing firmware updates to support future wireless standards.
Hardware
MCXW70 Arm Cortex-M33 microcontroller running up to 96 MHz
1.5 MB on-chip Flash memory unit
256 KB TCM RAM
On-board MCU-Link debugger with CMSIS-DAP
For more information about the MCXW70 SoC and FRDM-MCXW70 board, see:
Supported Features
The frdm_mcxw70 board supports the hardware features listed below.
- on-chip / on-board
- Feature integrated in the SoC / present on the board.
- 2 / 2
-
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files. -
vnd,foo -
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.
frdm_mcxw70/mcxw70ac target
Type |
Location |
Description |
Compatible |
|---|---|---|---|
CPU |
on-chip |
ARM Cortex-M33F CPU1 |
|
ADC |
on-chip |
LPC LPADC1 |
|
ARM architecture |
on-chip |
NXP NBU interruption information1 |
|
Bluetooth |
on-chip |
NXP BLE HCI information1 |
|
CAN |
on-chip |
NXP FlexCAN controller1 |
|
Clock control |
on-chip |
NXP K4 Generation SCG (System Clock Generator) IP node1 |
|
on-chip |
Generic fixed-rate clock provider1 |
||
Counter |
on-chip |
NXP Low Power Periodic Interrupt Timer (LPIT)1 |
|
on-chip |
Child node for the Low Power Periodic Interrupt Timer node, intended for an individual timer channel4 |
||
on-chip |
|||
DMA |
on-chip |
NXP MCUX EDMA controller1 |
|
Flash controller |
on-chip |
NXP MSF1 Flash Memory Module (FMU)1 |
|
GPIO & Headers |
on-chip |
Kinetis GPIO4 |
|
I2C |
on-chip |
NXP LPI2C controller2 |
|
IEEE 802.15.4 |
on-chip |
NXP MCXW71 IEEE 802.15.4 node1 |
|
Input |
on-board |
Group of GPIO-bound input keys1 |
|
Interrupt controller |
on-chip |
ARMv8-M NVIC (Nested Vectored Interrupt Controller)1 |
|
on-chip |
NXP Wakeup Unit (WUU)1 |
||
LED |
on-board |
Group of GPIO-controlled LEDs1 |
|
on-board |
Group of PWM-controlled LEDs1 |
||
MMU / MPU |
on-chip |
ARMv8-M MPU (Memory Protection Unit)1 |
|
MTD |
on-chip |
Flash node2 |
|
on-board |
Fixed partitions of a flash (or other non-volatile storage) memory2 |
||
Pin control |
on-chip |
NXP PORT Pin Controller4 |
|
on-chip |
NXP PORT Pin Controller1 |
||
Power management |
on-chip |
NXP Core Mode Controller (CMC)1 |
|
on-chip |
NXP System Power Control (SPC)1 |
||
PWM |
on-chip |
||
RNG |
on-chip |
Kinetis TRNG (True Random Number Generator)1 |
|
RTC |
on-chip |
NXP Real Time Clock (RTC)1 |
|
Serial controller |
on-chip |
NXP LPUART2 |
|
SPI |
on-chip |
NXP LPSPI controller3 |
|
SRAM |
on-chip |
Generic on-chip SRAM2 |
|
Timer |
on-chip |
ARMv8-M System Tick1 |
|
Watchdog |
on-chip |
||
on-chip |
NXP External Watchdog Monitor1 |
Fetch Binary Blobs
To support Bluetooth, frdm_mcxw70 requires fetching binary blobs, which can be achieved by running the following command:
west blobs fetch hal_nxp
Programming and Debugging
The frdm_mcxw70 board supports the runners and associated west commands listed below.
| flash | debug | rtt | debugserver | reset | attach | |
|---|---|---|---|---|---|---|
| jlink | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ |
| linkserver | ✅ (default) | ✅ (default) | ✅ | ✅ |
Build and flash applications as usual (see Building an Application and Run an Application for more details).
Configuring a Debug Probe
A debug probe is used for both flashing and debugging the board. This board is configured by default to use the MCU-Link CMSIS-DAP Onboard Debug Probe.
Using LinkServer
Linkserver is the default runner for this board, and supports the factory
default MCU-Link firmware. Follow the instructions in
MCU-Link CMSIS-DAP Onboard Debug Probe to reprogram the default MCU-Link
firmware. This only needs to be done if the default onboard debug circuit
firmware was changed. To put the board in DFU mode to program the firmware,
short jumper JP8.
Using J-Link
There are two options. The onboard debug circuit can be updated with Segger
J-Link firmware by following the instructions in
MCU-Link JLink Onboard Debug Probe.
To be able to program the firmware, you need to put the board in DFU mode
by shortening the jumper JP8.
The second option is to attach a J-Link External Debug Probe to the
10-pin SWD connector (J26) of the board.
For both options use the -r jlink option with west to use the jlink runner.
west flash -r jlink
Configuring a Console
Connect a USB cable from your PC to J28, and use the serial terminal of your choice (minicom, putty, etc.) with the following settings:
Speed: 115200
Data: 8 bits
Parity: None
Stop bits: 1
Application Building
Openthread applications
# From the root of the zephyr repository
west build -b frdm_mcxw70 samples/net/sockets/echo_server -- -DEXTRA_CONF_FILE=overlay-ot.conf
# From the root of the zephyr repository
west build -b frdm_mcxw70 samples/net/sockets/echo_client -- -DEXTRA_CONF_FILE=overlay-ot.conf
Application Flashing
Here is an example for the Hello World application.
# From the root of the zephyr repository
west build -b frdm_mcxw70 samples/hello_world
west flash
Open a serial terminal, reset the board (press the RESET button), and you should see the following message in the terminal:
*** Booting Zephyr OS build v4.2.0-xxx-xxxx ***
Hello World! frdm_mcxw70/mcxw706c
Debugging
Here is an example for the Hello World application.
# From the root of the zephyr repository
west build -b frdm_mcxw70/mcxw70ac samples/hello_world
west debug
Open a serial terminal, step through the application in your debugger, and you should see the following message in the terminal:
*** Booting Zephyr OS build v4.2.0-xxx-xxxx ***
Hello World! frdm_mcxw70/mcxw70ac
NBU Flashing
BLE functionality requires to fetch binary blobs, so make sure to follow
the Fetch Binary Blobs section first.
Two images must be written to the board: one for the host (CM33) and one for the NBU (CM3).
To flash the application (CM33) refer to the
Application Flashingsection above.To flash the
NBU Flashing, follow the instructions below:Install
blhostfrom NXP’s website. This is the tool that will allow you to flash the NBU.- Enter ISP mode. To boot the MCU in ISP mode, follow these steps:
Disconnect the
FRDM-MCXW70board from all power sources.Keep the
SW2(ISP) button on the board pressed, while connecting the board to the host computer USB port.Release the
SW2(ISP) button. The MCXW70 MCU boots in ISP mode.Reconnect any external power supply, if needed.
Use the following command to flash NBU file:
blhost.exe -p COMxx -- receive-sb-file mcxw70_nbu_ble.sb3
./blhost -p /dev/ttyxx -- receive-sb-file mcxw70_nbu_ble.sb3
blhost.exe -p COMxx -- receive-sb-file mcxw70_nbu_ble_15_4_dyn.sb3
./blhost -p /dev/ttyxx -- receive-sb-file mcxw70_nbu_ble_15_4_dyn.sb3
Please consider changing COMxx on Windows or ttyxx on Linux to the serial port used by your board.
The NBU files can be found in : <zephyr workspace>/modules/hal/nxp/zephyr/blobs/mcxw70/ folder.
For more details:
Troubleshooting
Using Segger SystemView and RTT
Note that when using SEGGER SystemView or RTT with this SOC, the RTT control
block address must be set manually within SystemView or the RTT Viewer. The
address provided to the tool should be the location of the _SEGGER_RTT
symbol, which can be found using a debugger or by examining the zephyr.map
file output by the linker.
The RTT control block address must be provided manually because this SOC supports ECC RAM. If the SEGGER tooling searches the ECC RAM space for the control block a fault will occur, provided that ECC is enabled and the RAM segment being searched has not been initialized to a known value.