FRDM-IMXRT1152

Overview

The FRDM-IMXRT1152 board is a design and evaluation platform based on the NXP i.MX RT1152 crossover MCU, featuring a single Cortex-M7 core running up to 800 MHz, 512KB of FlexRAM and 1MB of dedicated OCRAM.

Hardware

MIMXRT1152XHM8B MCU
- 800MHz Cortex-M7
- 512KB FlexRAM (configurable as ITCM/DTCM/OCRAM)
- 1MB dedicated OCRAM
Memory
- 512 Mbit QSPI Flash (W25Q512NW)
- 2x 256 Mbit HyperRAM (W959D8NFYA5) on FlexSPI2
Connectivity
- MCU-Link debug adapter with VCOM serial port
- 10/100/1000 Mbit ENET and ENET QOS PHYs
- USB 2.0 high speed
- FRDM/Arduino compatible expansion headers

Supported Features

The frdm_imxrt1152 board supports the hardware features listed below.

on-chip / on-board: Feature integrated in the SoC / present on the board.
2 / 2: Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.
vnd,foo: Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

`frdm_imxrt1152/mimxrt1152` target

On-target memory for this board target: 32 MiB of RAM, 64 MiB of Flash.

Type	Location	Description	Compatible
CPU	on-chip	ARM Cortex-M7 CPU1	`arm,cortex-m7`
ADC	on-chip	LPC LPADC2	`nxp,lpc-lpadc`
ARM architecture	on-chip	NXP MCUX XBAR (Crossbar Switch)3	`nxp,mcux-xbar`
Audio	on-chip	NXP PDM Microphone Interface (MICFIL)1	`nxp,micfil`
CAN	on-chip	NXP FlexCAN CANFD controller2	`nxp,flexcan-fd`
Clock control	on-chip	i.MX CCM Rev2 (Clock Controller Module) IP node1	`nxp,imx-ccm-rev2`
	on-chip	i.MX RT11xx ARM PLL clock provider1	`nxp,imxrt11xx-arm-pll`
	on-chip	i.MX ANATOP (Analog Clock Controller Module) IP node1	`nxp,imx-anatop`
	on-chip	Generic fixed-rate clock provider1	`fixed-clock`
Comparator	on-chip	NXP Kinetis ACMP (Analog CoMParator)4	`nxp,kinetis-acmp`
Counter	on-chip	NXP MCUX General-Purpose Timer (GPT)5	`nxp,imx-gpt`
	on-chip	NXP Periodic Interrupt Timer (PIT)2	`nxp,pit`
	on-chip	Child node for the Periodic Interrupt Timer node, intended for an individual timer channel8	`nxp,pit-channel`
DAC	on-chip	NXP MCUX DAC121	`nxp,dac12`
Display	on-chip	NXP i.MX eLCDIF (Enhanced LCD Interface) controller1	`nxp,imx-elcdif`
Display	on-chip	NXP i.MX LCDIFV2 (LCD Interface v2) controller1	`nxp,imx-lcdifv2`
DMA	on-chip	NXP MCUX EDMA controller2	`nxp,mcux-edma`
DMA	on-chip	NXP PXP 2D DMA engine1	`nxp,pxp`
Ethernet	on-chip	NXP ENET IP Module1	`nxp,enet`
	on-chip	NXP ENET MAC/L2 Device1	`nxp,enet-mac`
	on-chip	NXP ENET MDIO Features1	`nxp,enet-mdio`
	on-chip	NXP ENET PTP (Precision Time Protocol) Clock1	`nxp,enet-ptp-clock`
GPIO & Headers	on-chip	i.MX GPIO15	`nxp,imx-gpio`
Hardware information	on-chip	NXP SRC REV2 get reset cause flags1	`nxp,imx-src-rev2`
I2C	on-chip	NXP LPI2C controller5	`nxp,lpi2c`
I2S	on-chip	NXP mcux SAI-I2S controller3	`nxp,mcux-i2s`
Input	on-board	Group of GPIO-bound input keys1	`gpio-keys`
Interrupt controller	on-chip	ARMv7-M NVIC (Nested Vectored Interrupt Controller)1	`arm,v7m-nvic`
LED	on-board	Group of GPIO-controlled LEDs1	`gpio-leds`
Memory controller	on-chip	NXP Smart External Memory Controller (SEMC)1	`nxp,imx-semc`
Memory controller	on-chip	NXP FlexRAM on-chip RAM controller1	`nxp,flexram`
Miscellaneous	on-chip	NXP FlexIO controller2	`nxp,flexio`
MMU / MPU	on-chip	ARMv7-M Memory Protection Unit (MPU)1	`arm,armv7m-mpu`
MTD	on-board	NXP FlexSPI NOR1	`nxp,imx-flexspi-nor`
MTD	on-board	Flash node1	`soc-nv-flash`
Pin control	on-chip	This compatible binding should be applied to the device’s iomuxc DTS node1	`nxp,imx-iomuxc`
	on-chip	The node has the ‘pinctrl’ node label set in MCUX RT SoC’s devicetree1	`nxp,mcux-rt11xx-pinctrl`
	on-chip	The node has the ‘pinctrl’ node label set in MCUX RT SoC’s devicetree1	`nxp,mcux-rt-pinctrl`
	on-chip	i.MX IOMUXC2	`nxp,imx-gpr`
PWM	on-chip	NXP QTMR PWM4	`nxp,qtmr-pwm`
	on-chip	NXP eFLEX PWM module with mcux-pwm submodules4	`nxp,flexpwm`
	on-chip	NXP MCUX PWM16	`nxp,imx-pwm`
RNG	on-chip	IMX CAAM (Cryptographic Acceleration and Assurance Module)1	`nxp,imx-caam`
SDHC	on-chip	NXP imx USDHC controller2	`nxp,imx-usdhc`
Sensors	on-chip	NXP MCUX QDEC4	`nxp,mcux-qdec`
Serial controller	on-chip	NXP LPUART1 8	`nxp,lpuart`
SPI	on-chip	NXP FlexSPI controller1 1	`nxp,imx-flexspi`
SPI	on-chip	NXP LPSPI controller5	`nxp,lpspi`
Timer	on-chip	ARMv7-M System Tick1	`arm,armv7m-systick`
Timer	on-chip	NXP MCUX General-Purpose HW Timer (GPT)1	`nxp,gpt-hw-timer`
USB	on-chip	NXP EHCI USB device mode2	`nxp,ehci`
USB	on-chip	NXP USB High Speed PHY2	`nxp,usbphy`
Video	on-chip	NXP MCUX CMOS sensor interface1	`nxp,imx-csi`
Video	on-chip	NXP MIPI CSI-2 Rx interface1	`nxp,mipi-csi2rx`
Watchdog	on-chip	NXP External Watchdog Monitor1	`nxp,ewm`
Watchdog	on-chip	imxRT watchdog1	`nxp,imx-wdog`

Serial Port

The i.MX RT1152 SoC has 9 LPUART interfaces. LPUART1 is configured as the debug console, routed to the MCU-Link virtual COM port.

Programming and Debugging

The frdm_imxrt1152 board supports the runners and associated west commands listed below.

	flash	debug	debugserver	rtt	reset	attach
jlink	✅	✅	✅	✅	✅	✅
linkserver	✅ (default)	✅ (default)	✅			✅

Build and flash applications as usual (see Building an Application and Run an Application for more details).

Configuring a Debug Probe

A debug probe is used for both flashing and debugging the board. This board has an MCU-Link CMSIS-DAP Onboard Debug Probe.

Configuring a Console

Regardless of your choice in debug probe, we will use the MCU-Link serial device for a console once the board is flashed.

Use the following settings with your serial terminal of choice (minicom, putty, etc.):

Speed: 115200
Data: 8 bits
Parity: None
Stop bits: 1

Flashing

Here is an example for the Hello World application.

# From the root of the zephyr repository
west build -b frdm_imxrt1152/mimxrt1152 samples/hello_world
west flash

Open a serial terminal, reset the board (press the RESET button), and you should see the following message in the terminal:

***** Booting Zephyr OS v4.x.x *****
Hello World! frdm_imxrt1152/mimxrt1152

Debugging