RZ/G3E Evaluation Board Kit
Overview
The Renesas RZ/G3E Evaluation Board Kit (RZ/G3E-EVKIT) consists of a SMARC v2.1 module board and a carrier board.
Device: RZ/G3E R9A09G047E57GBG
Cortex-A55 x 4, Cortex-M33 Single
FCBGA 529-pin, 15mmSq body, 0.5mm pitch
SMARC v2.1 Module Board Functions
LPDDR4X SDRAM: 4GB x 1pc
QSPI flash memory: 16MB x 1pc
eMMC memory: 64GB x 1pc
PMIC power supply RAA215300A2GNP#HA8 implemented
microSD slot x2
Parallel interface
I3C connector
JTAG connector
ADC x8 channels
Current monitor (USB Micro B)
Carrier Board Functions
Gigabit Ethernet x2
USB2.0 x 2ch (OTG x1ch, Host x2ch)
USB3.2 x 1ch (Host x1ch)
CAN-FD interface x2
MIPI CSI-2 camera interface
Micro HDMI, over MIPI-DS
LVDS interface x2
microSD slot
Mono speaker interface, stereo headphone, mic. and aux. interfaces
PMOD x3 (Type 3A and Type 6A are exclusive)
PCIe Gen3 4-lane slot (G3E supports only 2-lane)M.2 Key E interface
M.2 Key B interface and SIM card slot
USB Type-C power input
Hardware
Detailed hardware features for the board can be found at:
Supported Features
The rzg3e_smarc board supports the hardware features listed below.
- on-chip / on-board
- Feature integrated in the SoC / present on the board.
- 2 / 2
-
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files. -
vnd,foo -
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.
rzg3e_smarc/r9a09g047e57gbg/cm33 target
Type |
Location |
Description |
Compatible |
|---|---|---|---|
CPU |
on-chip |
ARM Cortex-M33 CPU1 |
|
GPIO & Headers |
on-chip |
Renesas RZ GPIO common1 |
|
on-chip |
|||
Input |
on-board |
Group of GPIO-bound input keys1 |
|
Interrupt controller |
on-chip |
ARMv8-M NVIC (Nested Vectored Interrupt Controller)1 |
|
on-chip |
Renesas RZ Interrupt Controller1 |
||
on-chip |
|||
Miscellaneous |
on-chip |
||
MMU / MPU |
on-chip |
ARMv8-M MPU (Memory Protection Unit)1 |
|
Pin control |
on-chip |
Renesas RZ/G pin controller1 |
|
Serial controller |
on-chip |
||
SRAM |
on-board |
Generic on-chip SRAM1 |
|
Timer |
on-chip |
ARMv8-M System Tick1 |
Programming and Debugging
The rzg3e_smarc board supports the runners and associated west commands listed below.
| flash | debug | attach | reset | rtt | debugserver | |
|---|---|---|---|---|---|---|
| jlink | ✅ (default) | ✅ (default) | ✅ | ✅ | ✅ | ✅ |
Applications for the rzg3e_smarc board can be built in the usual way as
documented in Building an Application.
Console
The UART port for Cortex-M33 System Core can be accessed by connecting Pmod USBUART
to the upper side of PMOD1_3A.
Debugging
It is possible to load and execute a Zephyr application binary on
this board on the Cortex-M33 System Core from
the internal SRAM, using JLink debugger (J-Link Debug Host Tools).
Here is an example for building and debugging with the Hello World application.
# From the root of the zephyr repository
west build -b rzg3e_smarc/r9a09g047e57gbg/cm33 samples/hello_world
west debug
Flashing
RZ/G3E-EVKIT is designed to start different systems on different cores. It uses Yocto as the build system to build Linux system and boot loaders to run Zephyr on Cortex-M33 with u-boot. The minimal steps are described below.
Follow ‘’2.1 Building Images’’ of RZ/G3E-EVKIT Linux Start-up Guide [3] to prepare the build environment.
At step (5), follow step ‘’2. Download Multi-OS Package’’ and ‘’3. Add the layer for Multi-OS Package’’ of ‘’3.2 Integration of OpenAMP related stuff’’ of RZ/G3E Quick Start Guide for RZ/G3E Multi-OS Package [4] to add the layer for Multi-OS Package.
$ cd ~/rzg_vlp_<pkg ver>
$ unzip <Multi-OS Dir>/r01an5869ej0300-rzg-multi-os-pkg.zip
$ tar zxvf r01an5869ej0300-rzg-multi-os-pkg/meta-rz-features_multi-os_v3.0.0.tar.gz
$ cd build
$ bitbake-layers add-layer ../meta-rz-features/meta-rz-multi-os/meta-rzg3e
Start the build:
$ MACHINE=smarc-rzg3e bitbake core-image-minimal
The below necessary artifacts will be located in the build/tmp/deploy/images
Artifacts |
File name |
|---|---|
Boot loader |
bl2_bp_spi-smarc-rzg3e.srec fip-smarc-rzg3e.srec |
Flash Writer |
Flash_Writer_SCIF_RZG3E_EVK_LPDDR4X.mot |
SD card image |
core-image-minimal-smarc-rzg3e.rootfs.wic.gz core-image-minimal-smarc-rzg3e.rootfs.wic.bmap |
Follow ‘’4.4 Startup Procedure for RZ/G3E’’ of RZ/G3E-EVKIT Linux Start-up Guide [3] for power supply and board setting at SCIF download (SW_MODE[1:4] = OFF, ON, OFF, ON) and Cortex-A55 cold boot (BOOT[1:6] = OFF, OFF, ON, OFF, OFF, OFF)
Follow ‘’4.5 Download Flash Writer to RAM’’ of RZ/G3E-EVKIT Linux Start-up Guide [3] to download Flash Writer to RAM
Follow ‘’4.6 Write the Bootloader’’ of RZ/G3E-EVKIT Linux Start-up Guide [3] to write the boot loader to the target board by using Flash Writer.
Follow ‘’4.7 Change Boot Mode and set U-Boot variables’’ with switch setting (SW_MODE[1:4] = OFF, OFF, OFF, ON)
Follow ‘’3. Preparing the SD Card’’ of RZ/G3E-EVKIT Linux Start-up Guide [3] to write files to the microSD Card
Run the following commands to write zephyr.bin to SD card.
$ sudo mkdir /mnt/sd -p
$ sudo mount /dev/sdb2 /mnt/sd
$ sudo cp /path/to/zephyr.bin /mnt/sd/boot
$ sync
$ sudo umount /mnt/sd
Warning
Change /dev/sdb to your microSD card device name. Use dh -h to check.
Follow “4.3.2 CM33 Sample Program Invocation from u-boot” from step 2 to step 4 of RZ/G3E Quick Start Guide for RZ/G3E Multi-OS Package [4]
Execute the commands stated below on the console to start zephyr application with CM33 core.
=> setenv cm33start 'dcache off
=> mw.l 0x10420D2C 0x02000000
=> mw.l 0x1043080c 0x08003000
=> mw.l 0x10430810 0x18003000
=> mw.l 0x10420604 0x00040004
=> mw.l 0x10420C1C 0x00003100
=> mw.l 0x10420C0C 0x00000001
=> mw.l 0x10420904 0x00380008
=> mw.l 0x10420904 0x00380038
=> ext4load mmc 1:2 0x08003000 boot/zephyr.bin
=> mw.l 0x10420C0C 0x00000000
=> dcache on'
=> saveenv
=> run cm33start