RA0E1 Fast Prototype Board

Overview

The FPB-RA0E1 board is designed with an architecture similar to other boards in the FPB series. Alongside the RA MCU there is an on-board programmer, pin headers for access to all the pins on the RA MCU, a power supply regulator, some LEDs and switches, and several ecosystem I/O connectors (Pmod and Arduino).

The key features of the FPB-RA0E1 board are categorized in two groups (consistent with the architecture of the board) as follows:

MCU and MCU Native Pin Access

  • R7FA0E1073CFJ MCU (referred to as RA MCU)

  • 32 MHz, Arm® Cortex®-M23 core

  • 64 KB Code Flash, 12 KB SRAM, 1 KB Data Flash

  • 32-pin, LQFP package

  • Native pin access through 2 x 16-pin male headers (not fitted)

  • MCU’s VCC current measurement point for precision current consumption measurement

  • Multiple clock sources – Oscillators for high-speed, medium-speed, and low-speed on-chip clock signals are available in the RA MCU. Signals from crystal oscillators at 20.000 MHz (not fitted) and 32.768 kHz can also be used for the main clock and the sub-clock, respectively

System Control and Ecosystem Access

  • USB Full Speed Device (USB 2.0 Type-C™ connector)

  • Two 5 V input sources

    • USB (Debug, Full Speed)

    • External power supply (using 2-pin header) (not fitted)

  • On-board debugger (SWD)

  • User LEDs and buttons

    • User LEDs (green) x 2

    • Power LED (green) indicating availability of regulated power

    • Debug/power LED (yellow) indicating power and the debug connection

    • User button x 1

    • Reset button x 1

  • Two popular ecosystem expansions

    • Digilent PmodTM (SPI, UART, and I2C) connectors x 2

    • Arduino® (Uno R3) connectors

Hardware

Detailed hardware features can be found at:

Supported Features

The fpb_ra0e1 board supports the hardware features listed below.

on-chip / on-board
Feature integrated in the SoC / present on the board.
2 / 2
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.
vnd,foo
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

fpb_ra0e1/r7fa0e1073cfj target

Type

Location

Description

Compatible

CPU

on-chip

ARM Cortex-M23 CPU1

arm,cortex-m23

Clock control

on-chip

Renesas RA Clock Generation Circuit external clock configuration1

renesas,ra-cgc-external-clock

on-chip

Generic fixed-rate clock provider3

fixed-clock

on-chip

Renesas RA Sub-Clock1

renesas,ra-cgc-subclk

on-chip

Generic fixed factor clock provider41

fixed-factor-clock

on-chip

Renesas RA Clock Control node pclk block1

renesas,ra-cgc-pclk-block

on-chip

Renesas RA Clock Control Peripheral Clock95

renesas,ra-cgc-pclk

CRC

on-chip

Renesas RA CRC device1

renesas,ra-crc

Flash controller

on-chip

Renesas RA family flash low-power controller1

renesas,ra-flash-lp-controller

GPIO & Headers

on-chip

Renesas RA GPIO I/O Port24

renesas,ra-gpio-ioport

Input

on-board

Group of GPIO-bound input keys1

gpio-keys

Interrupt controller

on-chip

ARMv8-M NVIC (Nested Vectored Interrupt Controller)1

arm,v8m-nvic

LED

on-board

Group of GPIO-controlled LEDs1

gpio-leds

Miscellaneous

on-chip

Renesas RA Event Link Controller1

renesas,ra-elc

on-chip

Renesas RA External Interrupt15

renesas,ra-external-interrupt

on-chip

Renesas RA Serial Array Unit (SAU)2

renesas,ra-sau

on-chip

Renesas RA Serial Array Unit Channel (SAU channel)6

renesas,ra-sau-channel

MTD

on-chip

Flash memory binding for Renesas RA Code flash region1

renesas,ra-nv-code-flash

on-chip

Flash memory binding for Renesas RA Data flash region1

renesas,ra-nv-data-flash

on-board

Fixed partitions of a flash (or other non-volatile storage) memory1

fixed-partitions

Pin control

on-chip

Renesas RA0 Pin Controller1

renesas,ra0-pinctrl-pfs

Reserved memory

on-chip

Renesas Option-Setting Memory2

renesas,ofs-memory

Serial controller

on-chip

Renesas RA SAU UART12

renesas,ra-uart-sau

SRAM

on-chip

Generic on-chip SRAM1

mmio-sram

Timer

on-chip

ARMv8-M System Tick1

arm,armv8m-systick

Programming and Debugging

The fpb_ra0e1 board supports the runners and associated west commands listed below.

flash debug attach rtt debugserver reset
jlink ✅ (default) ✅ (default)
pyocd

Applications for the fpb_ra0e1 board configuration can be built, flashed, and debugged in the usual way. See Building an Application and Run an Application for more details on building and running.

Here is an example for the Hello World application.

# From the root of the zephyr repository
west build -b fpb_ra0e1 samples/hello_world
west flash

Open a serial terminal, reset the board (press the reset switch S2), and you should see the following message in the terminal:

***** Booting Zephyr OS v4.3.0-xxx-xxxxxxxxxxxxx *****
Hello World! fpb_ra0e1/r7fa0e1073cfj

Flashing

Program can be flashed to FPB-RA0E1 via the on-board SEGGER J-Link debugger. SEGGER J-link’s drivers are available at https://www.segger.com/downloads/jlink/

To flash the program to board

  1. Connect to J-Link OB via USB port to host PC

  2. Make sure J-Link OB jumper is in default configuration as describe in FPB-RA0E1 - User’s Manual

  3. Execute west command

    west flash -r jlink
    

References