RA8M2 Evaluation Kit

Board Overview

RA8M2 Evaluation Kit

Name:

ek_ra8m2

Vendor:

Renesas Electronics Corporation

Architecture:

arm

SoC:

r7ka8m2jflcac

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Overview

The EK-RA8M2 is an Evaluation Kit for Renesas RA8M2 MCU Group which integrates multiple series of software-compatible Arm®-based 32-bit cores that share a common set of Renesas peripherals to facilitate design scalability and efficient platform-based product development.

The MCU in this series incorporates a high-performance Arm® Cortex®-M85 core running up to 1 GHz and Arm® Cortex®-M33 core running up to 250 MHz with the following features:

• Up to 1 MB MRAM

• 2 MB SRAM (256 KB of CM85 TCM RAM, 128 KB CM33 TCM RAM, 1664 KB of user SRAM)

• Octal Serial Peripheral Interface (OSPI)

• Layer 3 Ethernet Switch Module (ESWM), USBFS, USBHS, SD/MMC Host Interface

• Analog peripherals

• Security and safety features

MCU Native Pin Access

• 1 GHz Arm® Cortex®-M85 core and 250 MHz Arm® Cortex®-M33 core based RA8M2 MCU 289 pins, BGA package

• 1 MB MRAM, 2 MB SRAM with ECC

• Native pin access through 5 x 20-pin, and 3 x 40-pin headers (not populated)

• MCU current measurement points for precision current consumption measurement

• Multiple clock sources - RA8M2 MCU oscillator and sub-clock oscillator crystals, providing precision 24.000 MHz and 32,768 Hz reference clocks. Additional low-precision clocks are available internal to the RA8M2 MCU

• RTC Backup battery connector J36 (not populated)

System Control and Ecosystem Access

• USB Full Speed Host and Device (USB-C connector)

• Four 5V input sources

  • USB (Debug, Full Speed, High Speed)

  • External power supply (using surface mount clamp test points and power input vias)

• Three Debug modes

  • Debug on-board (SWD and JTAG)

  • Debug in (ETM, SWD, SWO, and JTAG)

  • Debug out (SWD, SWO, and JTAG)

• User LEDs, Status LEDs and Switches

  • Three User LEDs (red, blue, green)

  • Power LED (white) indicating availability of regulated power

  • Debug LED (yellow) indicating the debug connection

  • Two User Switches

  • One Reset Switch

• Five most popular ecosystems expansions

  • Two Seeed Grove® system (I2C/I3C/Analog) connectors (not populated)

  • SparkFun® Qwiic® connector (not populated)

  • Two Digilent PmodTM (SPI, UART, and I2C) connectors

  • Arduino™ (UNO R3) connector

  • MikroElektronikaTM mikroBUS connector (not populated)

• MCU boot configuration jumper

Special Feature Access

• Ethernet (RJ45 RGMII interface)

• USB High Speed Host and Device (USB-C connector)

• 64 MB (512 Mb) External Octo-SPI Flash (present in the MCU Native Pin Access area of the EK-RA8M2 board)

• RS485 / MODBUS (3.5mm pitch 4-pin terminal block)

• CAN FD (3-pin header)

• Configuration Switches

Hardware

Detailed hardware features can be found at:

• RA8M2 MCU: RA8M2 Group User’s Manual Hardware

• EK-RA8M2 board: EK-RA8M2 - User’s Manual

Supported Features

The ek_ra8m2 board supports the hardware features listed below.

on-chip / on-board

Feature integrated in the SoC / present on the board.

2 / 2

Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.

vnd,foo

Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

ek_ra8m2/r7ka8m2jflcac/cm85 target

Type	Location	Description	Compatible
CPU	on-chip	ARM Cortex-M85 CPU1	arm,cortex-m85
CAN	on-chip	Renesas RA CANFD controller global1	renesas,ra-canfd-global
	on-chip	Renesas RA CANFD controller1 1	renesas,ra-canfd
Clock control	on-chip	Renesas RA Clock Generation Circuit external clock configuration1	renesas,ra-cgc-external-clock
	on-chip	Generic fixed-rate clock provider3	fixed-clock
	on-chip	Renesas RA Sub-Clock1	renesas,ra-cgc-subclk
	on-chip	Renesas RA Clock Generation Circuit PLL Clock2	renesas,ra-cgc-pll
	on-chip	Renesas RA Clock Generation Circuit PLL Clock out line6	renesas,ra-cgc-pll-out
	on-chip	Renesas RA Clock Control node pclk block1	renesas,ra-cgc-pclk-block
	on-chip	Renesas RA Clock Control Peripheral Clock15 10	renesas,ra-cgc-pclk
	on-chip	Renesas RA External Bus Clock1	renesas,ra-cgc-busclk
Comparator	on-chip	Renesas RA ACMPHS (High-Speed Analog COMParator) Global1	renesas,ra-acmphs-global
	on-chip	Renesas RA ACMPHS (High-Speed Analog COMParator) Controller4	renesas,ra-acmphs
	on-chip	Renesas RA LVD (Low-voltage detection) Controller4	renesas,ra-lvd
Counter	on-chip	Renesas RA AGT as Counter2	renesas,ra-agt-counter
CRC	on-chip	Renesas RA CRC device1	renesas,ra-crc
DMA	on-chip	Renesas RA DMA Controller1	renesas,ra-dma
Flash controller	on-chip	Renesas RA flash MRAM controller1	renesas,ra-mram-controller
GPIO & Headers	on-chip	Renesas RA GPIO I/O Port11 3	renesas,ra-gpio-ioport
	on-board	GPIO pins exposed on Mikro BUS headers1	mikro-bus
I2C	on-chip	Renesas RA I2C Master controller3	renesas,ra-iic
	on-chip	Renesas RA SCI-B I2C controller10	renesas,ra-i2c-sci-b
I2S	on-chip	Renesas RA I2S controller2	renesas,ra-i2s-ssie
I3C	on-chip	Renesas RA I3C controller1	renesas,ra-i3c
Input	on-board	Group of GPIO-bound input keys1	gpio-keys
Interrupt controller	on-chip	ARMv8.1-M NVIC (Nested Vectored Interrupt Controller)1	arm,v8.1m-nvic
LED	on-board	Group of GPIO-controlled LEDs1	gpio-leds
Memory controller	on-chip	Renesas RA SDRAM controller1	renesas,ra-sdram
Miscellaneous	on-chip	Renesas RA SCI controller2 8	renesas,ra-sci
	on-chip	Renesas RA AGT2	renesas,ra-agt
	on-chip	Renesas RA ULPT2	renesas,ra-ulpt
	on-chip	Renesas RA External Interrupt2 30	renesas,ra-external-interrupt
MMU / MPU	on-chip	ARMv8.1-M MPU (Memory Protection Unit)1	arm,armv8.1m-mpu
MTD	on-chip	MRAM memory of Renesas RA family1	renesas,ra-nv-mram
	on-board	Fixed partitions of a flash (or other non-volatile storage) memory1	fixed-partitions
PHY	on-chip	This binding is to be used by all the usb transceivers which are built-in with USB IP1	usb-nop-xceiv
	on-chip	Renesas RA USBHS internal PHY controller1	renesas,ra-usbphyc
	on-board	Simple GPIO controlled CAN transceiver1	can-transceiver-gpio
Pin control	on-chip	Renesas RA Pin Controller1	renesas,ra-pinctrl-pfs
Power management	on-chip	Renesas RA battery backup domain1	renesas,ra-battery-backup
PWM	on-chip	Renesas RA Pulse Width Modulation1 13	renesas,ra-pwm
RTC	on-chip	Renesas RA RTC1	renesas,ra-rtc
SDHC	on-chip	Renesas RA SDHC2	renesas,ra-sdhc
Serial controller	on-chip	Renesas RA SCI_B UART controller1 9	renesas,ra8-uart-sci-b
SPI	on-chip	Renesas RA8 SPI_B controller2	renesas,ra8-spi-b
SRAM	on-chip	Generic on-chip SRAM1	mmio-sram
Timer	on-chip	ARMv8.1-M System Tick1	arm,armv8.1m-systick
	on-chip	Renesas RA ULPT TIMER2	renesas,ra-ulpt-timer
USB	on-chip	Renesas RA USB full-speed controller1	renesas,ra-usbfs
	on-chip	Renesas RA USB device controller1 1	renesas,ra-udc
	on-chip	Renesas RA USB high-speed controller1	renesas,ra-usbhs
Video	on-chip	Renesas RA Capture Engine Unit Driver (ceu)1	renesas,ra-ceu
Watchdog	on-chip	Renesas RA Watchdog (wdt)1	renesas,ra-wdt

Programming and Debugging

Applications for the ek_ra8m2 board configuration can be built, flashed, and debugged in the usual way. See Building an Application and Run an Application for more details on building and running.

Here is an example for the Hello World application on CM85 core.

# From the root of the zephyr repository
west build -b ek_ra8m2/r7ka8m2jflcac/cm85 samples/hello_world
west flash

Open a serial terminal, reset the board (press the reset switch SW3), and you should see the following message in the terminal:

***** Booting Zephyr OS v4.2.0-xxx-xxxxxxxxxxxxx *****
Hello World! ek_ra8m2/r7ka8m2jflcac/cm85

Flashing

Program can be flashed to EK-RA8M2 via the on-board SEGGER J-Link debugger. SEGGER J-link’s drivers are available at https://www.segger.com/downloads/jlink/

To flash the program to board

1. Connect to J-Link OB via USB port to host PC

2. Make sure J-Link OB jumper is in default configuration as described in EK-RA8M2 - User’s Manual

3. Execute west command

   west flash -r jlink
   

MCUboot bootloader

The sysbuild makes possible to build and flash all necessary images needed to bootstrap the board.

To build the sample application using sysbuild use the command:

# From the root of the zephyr repository
west build -b ek_ra8m2/r7ka8m2jflcac/cm85 --sysbuild samples/hello_world -- -DSB_CONFIG_BOOTLOADER_MCUBOOT=y
west flash

By default, Sysbuild creates MCUboot and user application images.

Build directory structure created by sysbuild is different from traditional Zephyr build. Output is structured by the domain subdirectories:

build/
├── hello_world
|    └── zephyr
│       ├── zephyr.elf
│       ├── zephyr.hex
│       ├── zephyr.bin
│       ├── zephyr.signed.bin
│       └── zephyr.signed.hex
├── mcuboot
│    └── zephyr
│       ├── zephyr.elf
│       ├── zephyr.hex
│       └── zephyr.bin
└── domains.yaml

Note

With --sysbuild option, MCUboot will be rebuilt and reflashed every time the pristine build is used.

To only flash the user application in the subsequent builds, Use:

$ west flash --domain hello_world

For more information about the system build please read the Sysbuild (System build) documentation.

You should see the following message in the terminal:

*** Booting MCUboot v2.2.0-171-g8513be710e5e ***
*** Using Zephyr OS build v4.2.0-6183-gdd720e2f0dc5 ***
I: Starting bootloader
I: Image index: 0, Swap type: none
I: Image index: 0, Swap type: none
I: Primary image: magic=unset, swap_type=0x1, copy_done=0x3, image_ok=0x3
I: Secondary image: magic=unset, swap_type=0x1, copy_done=0x3, image_ok=0x3
I: Boot source: none
I: Image index: 0, Swap type: none
I: Image index: 0, Swap type: none
I: Image index: 0, Swap type: none
I: Image index: 0, Swap type: none
I: Bootloader chainload address offset: 0x10000
I: Image version: v0.0.0
I: Jumping to the first image slot
*** Booting Zephyr OS build v4.2.0-6183-gdd720e2f0dc5 ***
Hello World! ek_ra8m2/r7ka8m2jflcac/cm85

References

• EK-RA8M2 Website

• RA8M2 MCU group Website