RA8D1 AI Kit Development Platform
Overview
The AIK-RA8D1 provides developers with multiple and reconfigurable connectivity functions to expedite AI/ML system development. This easy-to-use hardware platform for multimodal AI/ML solutions is based on the RA8D1 MCU from the RA family of 32-bit MCUs.
The hardware platform is intended for use in a variety of AI/ML single or multimodal use cases supporting vision, real-time analytics, and audio. It enables multiple combinations of different plug-in sensors with the available onboard analog microphones and camera.
On-board support is included for several of the most commonly used peripherals, as well as interfaces for several common ecosystem standards.
The key features of the AIK-RA8D1 board are categorized as follows:
Renesas RA8D1 Microcontroller Group
R7FA8D1BHECBD
176-pin LQFP package
480 MHz Arm® Cortex® -M85 core with Helium®
1 MB on-chip SRAM
2 MB on-chip code flash memory
12 KB on-chip data flash memory
On-board external SDRAM (128Mbit)
Connectivity
One USB micro AB full speed connector for the Main MCU
SEGGER J-Link® On-board (OB) interface for debugging and programming of the RA8D1 MCU. A 10 pin JTAG/SWD interface are also provided for connecting optional external debuggers and programmers
Six PMOD connectors, allowing use of appropriate PMOD compliant peripheral plug-in modules for rapid prototyping
One Auxiliary Port connector
One CAN interface
One RJ-45 RMII Ethernet interface
Other on-board features
20-pin DVP interface for camera input
2 Analog MEMS microphones
Two user push button switches
One LED RGB
Hardware
Detailed Hardware features for the AIK-RA8D1 kit can be found at AIK-RA8D1 - User’s Manual [1]
Supported Features
The aik_ra8d1 board supports the hardware features listed below.
- on-chip / on-board
- Feature integrated in the SoC / present on the board.
- 2 / 2
-
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files. -
vnd,foo -
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.
aik_ra8d1/r7fa8d1bhecbd target
Type |
Location |
Description |
Compatible |
|---|---|---|---|
CPU |
on-chip |
ARM Cortex-M85 CPU1 |
|
ADC |
on-chip |
Renesas RA 12-bit resolution ADC (ADC12)2 |
|
CAN |
on-chip |
Renesas RA CANFD controller global1 |
|
on-chip |
|||
Clock control |
on-chip |
Renesas RA Clock Generation Circuit external clock configuration1 |
|
on-chip |
Generic fixed-rate clock provider3 |
||
on-chip |
Renesas RA Sub-Clock1 |
||
on-chip |
|||
on-chip |
|||
on-chip |
Renesas RA Clock Control node pclk block1 |
||
on-chip |
|||
on-chip |
Renesas RA External Bus Clock1 |
||
on-board |
An external clock signal driven by a PWM pin1 |
||
Comparator |
on-chip |
Renesas RA ACMPHS (High-Speed Analog COMParator) Global1 |
|
on-chip |
Renesas RA ACMPHS (High-Speed Analog COMParator) Controller2 |
||
on-chip |
Renesas RA LVD (Low-voltage detection) Controller2 |
||
Counter |
on-chip |
Renesas RA AGT as Counter2 |
|
CRC |
on-chip |
Renesas RA CRC device1 |
|
DAC |
on-chip |
Renesas RA DAC Controller Global1 |
|
on-chip |
Renesas RA DAC Controller2 |
||
Display |
on-chip |
Renesas Graphic LCD controller1 |
|
DMA |
on-chip |
Renesas RA DMA Controller1 |
|
Ethernet |
on-chip |
Renesas RA Ethernet1 |
|
on-chip |
Renesas RA External MDIO controller1 |
||
on-board |
Generic MII PHY1 |
||
Flash controller |
on-chip |
Renesas RA family flash high-performance controller1 |
|
GPIO & Headers |
on-chip |
||
on-board |
GPIO pins exposed on Renesas MIPI lcd display headers1 |
||
on-board |
ArduCam 20-pin header camera connector.1 |
||
on-board |
GPIO pins exposed on a Digilent Pmod interface8 |
||
I2C |
on-chip |
Renesas RA I2C controller2 |
|
on-chip |
Renesas RA SCI-B I2C controller6 |
||
I2S |
on-chip |
Renesas RA I2S controller2 |
|
I3C |
on-chip |
Renesas RA I3C controller1 |
|
Input |
on-board |
Group of GPIO-bound input keys1 |
|
Interrupt controller |
on-chip |
ARMv8.1-M NVIC (Nested Vectored Interrupt Controller)1 |
|
LED |
on-board |
Group of GPIO-controlled LEDs1 |
|
Memory controller |
on-chip |
Renesas RA SDRAM controller1 |
|
MIPI-DSI |
on-chip |
Renesas RA MIPI DSI host1 |
|
Miscellaneous |
on-chip |
Renesas RA Event Link Controller1 |
|
on-chip |
|||
on-chip |
Renesas RA ULPT2 |
||
on-chip |
Renesas RA AGT2 |
||
on-chip |
|||
on-chip |
Renesas RA DRW1 |
||
MMU / MPU |
on-chip |
ARMv8.1-M MPU (Memory Protection Unit)1 |
|
MTD |
on-chip |
Flash memory binding for Renesas RA Code flash region1 |
|
on-chip |
Flash memory binding for Renesas RA Data flash region1 |
||
on-board |
Fixed partitions of a flash (or other non-volatile storage) memory1 |
||
OCTOSPI |
on-chip |
Renesas RA OSPI1 |
|
PHY |
on-chip |
This binding is to be used by all the usb transceivers which are built-in with USB IP1 |
|
on-chip |
Renesas RA USBHS internal PHY controller1 |
||
Pin control |
on-chip |
Renesas RA Pin Controller1 |
|
Power management |
on-chip |
Renesas RA battery backup domain1 |
|
PWM |
on-chip |
Renesas RA Pulse Width Modulation14 |
|
RNG |
on-chip |
Renesas RA RSIP-E51A TRNG1 |
|
RTC |
on-chip |
Renesas RA RTC1 |
|
SDHC |
on-chip |
Renesas RA SDHC2 |
|
Serial controller |
on-chip |
||
SPI |
on-chip |
Renesas RA SCI B SPI6 |
|
on-chip |
Renesas RA8 SPI_B controller2 |
||
SRAM |
on-chip |
Generic on-chip SRAM1 |
|
Timer |
on-chip |
ARMv8.1-M System Tick1 |
|
on-chip |
Renesas RA ULPT TIMER2 |
||
USB |
on-chip |
Renesas RA USB full-speed controller1 |
|
on-chip |
|||
on-chip |
Renesas RA USB high-speed controller1 |
||
Video |
on-chip |
Renesas RA Capture Engine Unit Driver (ceu)1 |
|
Watchdog |
on-chip |
Renesas RA Watchdog (wdt)1 |
Programming and Debugging
The aik_ra8d1 board supports the runners and associated west commands listed below.
| flash | debug | debugserver | rtt | attach | reset | |
|---|---|---|---|---|---|---|
| jlink | ✅ (default) | ✅ (default) | ✅ | ✅ | ✅ | ✅ |
| pyocd | ✅ | ✅ | ✅ | ✅ | ✅ |
Applications for the aik_ra8d1 board can be built, flashed, and debugged in the usual way. See
Building an Application and Run an Application for more details on building and running.
Configuring the Debug Probe
The AIK-RA8D1 board includes an on-board SEGGER J-Link debugger. SEGGER J-Link drivers are available at https://www.segger.com/downloads/jlink
To use the on-board J-Link debugger, ensure that:
The J-Link OB is connected to the host PC via the USB port (J10).
The J-Link OB jumper is in the default configuration as described in the AIK-RA8D1 - User’s Manual [1].
Configuring a Console
Connect a USB cable from your PC to the on-board virtual COM port (J10), and use a serial terminal of your choice (minicom, PuTTY, etc.) with the following settings:
Speed: 115200
Data: 8 bits
Parity: None
Stop bits: 1
Flashing
Here is an example for the Hello World application.
# From the root of the zephyr repository
west build -b aik_ra8d1 samples/hello_world
west flash
Open a serial terminal, reset the board (push the reset switch S1), and you should see the following message in the terminal:
***** Booting Zephyr OS v4.3.0-xxx-xxxxxxxxxxxxx *****
Hello World! aik_ra8d1
Debugging
Here is an example for the Hello World application.
# From the root of the zephyr repository
west build -b aik_ra8d1 samples/hello_world
west debug
Open a serial terminal, step through the application in your debugger, and you should see the following message in the terminal:
***** Booting Zephyr OS v4.3.0-xxx-xxxxxxxxxxxxx *****
Hello World! aik_ra8d1