Fast Prototyping Board for RA8E1 MCU Group
Overview
The FPB-RA8E1, a Fast Prototyping Board for the RA8E1 MCU Group, enables users to seamlessly evaluate the features of the RA8E1 MCU group and develop embedded systems applications using Flexible Software Package (FSP) and the e2 studio IDE. Users can use on-board features along with their choice of popular ecosystems add-ons to bring their big ideas to life.
The MCU in this series incorporates a high-performance Arm® Cortex®-M85 core with HeliumTMrunning up to 360 MHz with the following features:
1 MB code flash memory
544 KB SRAM (32 KB of TCM RAM, 512 KB of user SRAM)
Octal Serial Peripheral Interface (OSPI)
Ethernet MAC Controller (ETHERC), USBFS
Analog peripherals
Security and safety features
The following components are included in the FPB-RA8E1 box:
FPB-RA8E1 v1 board
FPB-RA8E1 v1 Quick Start Guide
The specifications of the CPU board are shown below:
MCU specifications
360 MHz Arm® Cortex®-M85 core based RA8E1 MCU 144 pins, LQFP package
ROM/SRAM size: 1MB/512KB
MCU input clock: 20MHz (Generate with external crystal oscillator)
Power supply: DC 5V, select one way automatically from the below:
Power is supplied from the Debug USB connector (J10)
Power is supplied from an external 5V input (J60 or via TP7/TP9)
Connector
Two Digilent Pmod™ (SPI, I2C and UART [Pmod 1] and SPI/UART [Pmod 2]) connectors
Arduino™ (UNO R3) connectors
JTAG/SWD Connector
Debug USB-C connector
External +5 V power source connector (J60)
Real Time Clock backup supply battery connector
20-pin Camera Interface connector
Onboard debugger
This product has the onboard debugger circuit, J-Link On-Board (hereinafter called “J-Link-OB”). When you write a program, connect the CPU board to PC with USB cable. J-Link-OB operates as debugger equivalent to J-Link. If connecting from flash programing tool (e.g. J-Flash Lite by SEGGER), set the type of debugger (tool) to “JLink”
Hardware
Detailed Hardware features for the RA8E1 MCU group can be found at:
The RA8E1 MCU group: RA8E1 Group User’s Manual Hardware
The FPB-RA8E1 board: FPB-RA8E1 - User’s Manual
Supported Features
The fpb_ra8e1 board supports the hardware features listed below.
- on-chip / on-board
- Feature integrated in the SoC / present on the board.
- 2 / 2
-
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files. -
vnd,foo -
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.
fpb_ra8e1/r7fa8e1afdcfb target
Type |
Location |
Description |
Compatible |
|---|---|---|---|
CPU |
on-chip |
ARM Cortex-M85 CPU1 |
|
ADC |
on-chip |
||
CAN |
on-chip |
Renesas RA CANFD controller global1 |
|
on-chip |
Renesas RA CANFD controller2 |
||
Clock control |
on-chip |
Renesas RA Clock Generation Circuit external clock configuration1 |
|
on-chip |
Generic fixed-rate clock provider3 |
||
on-chip |
Renesas RA Sub-Clock1 |
||
on-chip |
|||
on-chip |
|||
on-chip |
Renesas RA Clock Control node pclk block1 |
||
on-chip |
|||
Comparator |
on-chip |
Renesas RA ACMPHS (High-Speed Analog COMParator) Global1 |
|
on-chip |
Renesas RA ACMPHS (High-Speed Analog COMParator) Controller2 |
||
on-chip |
Renesas RA LVD (Low-voltage detection) Controller2 |
||
Counter |
on-chip |
Renesas RA AGT as Counter2 |
|
CRC |
on-chip |
Renesas RA CRC device1 |
|
DAC |
on-chip |
Renesas RA DAC Controller Global1 |
|
on-chip |
|||
DMA |
on-chip |
Renesas RA DMA Controller1 |
|
Ethernet |
on-chip |
Renesas RA Ethernet1 |
|
on-chip |
Renesas RA External MDIO controller1 |
||
Flash controller |
on-chip |
Renesas RA family flash high-performance controller1 |
|
GPIO & Headers |
on-chip |
||
on-board |
GPIO pins exposed on a Digilent Pmod interface2 |
||
I2C |
on-chip |
Renesas RA I2C controller2 |
|
on-chip |
Renesas RA SCI-B I2C controller6 |
||
I2S |
on-chip |
Renesas RA I2S controller2 |
|
Input |
on-board |
Group of GPIO-bound input keys1 |
|
Interrupt controller |
on-chip |
ARMv8.1-M NVIC (Nested Vectored Interrupt Controller)1 |
|
LED |
on-board |
Group of GPIO-controlled LEDs1 |
|
Miscellaneous |
on-chip |
Renesas RA Event Link Controller1 |
|
on-chip |
|||
on-chip |
Renesas RA ULPT2 |
||
on-chip |
Renesas RA AGT2 |
||
on-chip |
|||
MMU / MPU |
on-chip |
ARMv8.1-M MPU (Memory Protection Unit)1 |
|
MTD |
on-chip |
Flash memory binding for Renesas RA Code flash region1 |
|
on-chip |
Flash memory binding for Renesas RA Data flash region1 |
||
on-board |
Fixed partitions of a flash (or other non-volatile storage) memory1 |
||
OCTOSPI |
on-chip |
Renesas RA OSPI1 |
|
PHY |
on-chip |
This binding is to be used by all the usb transceivers which are built-in with USB IP1 |
|
Pin control |
on-chip |
Renesas RA Pin Controller1 |
|
Power management |
on-chip |
Renesas RA battery backup domain1 |
|
PWM |
on-chip |
||
RNG |
on-chip |
Renesas RA RSIP-E51A TRNG1 |
|
RTC |
on-chip |
Renesas RA RTC1 |
|
Serial controller |
on-chip |
||
SPI |
on-chip |
Renesas RA SCI B SPI6 |
|
on-chip |
|||
SRAM |
on-chip |
Generic on-chip SRAM1 |
|
Timer |
on-chip |
ARMv8.1-M System Tick1 |
|
on-chip |
Renesas RA ULPT TIMER2 |
||
USB |
on-chip |
Renesas RA USB full-speed controller1 |
|
on-chip |
Renesas RA USB device controller1 |
||
Video |
on-chip |
Renesas RA Capture Engine Unit Driver (ceu)1 |
|
Watchdog |
on-chip |
Renesas RA Watchdog (wdt)1 |
Programming and Debugging
The fpb_ra8e1 board supports the runners and associated west commands listed below.
| flash | debug | attach | rtt | debugserver | reset | |
|---|---|---|---|---|---|---|
| jlink | ✅ (default) | ✅ (default) | ✅ | ✅ | ✅ | ✅ |
| pyocd | ✅ | ✅ | ✅ | ✅ | ✅ |
Applications for the fpb_ra8e1 board can be built, flashed, and debugged in the usual way. See
Building an Application and Run an Application for more details on building and running.
Configuring the Debug Probe
The FPB-RA8E1 board includes an on-board SEGGER J-Link debugger. SEGGER J-Link drivers are available at https://www.segger.com/downloads/jlink
To use the on-board J-Link debugger, ensure that:
The J-Link OB is connected to the host PC via the USB port (J10).
The J-Link OB jumper is in the default configuration as described in the FPB-RA8E1 - User’s Manual.
Configuring a Console
Connect a USB cable from your PC to the on-board virtual COM port (J10), and use a serial terminal of your choice (minicom, PuTTY, etc.) with the following settings:
Speed: 115200
Data: 8 bits
Parity: None
Stop bits: 1
Flashing
Here is an example for the Hello World application.
# From the root of the zephyr repository
west build -b fpb_ra8e1 samples/hello_world
west flash
Open a serial terminal, reset the board (push the reset switch S2), and you should see the following message in the terminal:
***** Booting Zephyr OS v4.3.0-xxx-xxxxxxxxxxxxx *****
Hello World! fpb_ra8e1
Debugging
Here is an example for the Hello World application.
# From the root of the zephyr repository
west build -b fpb_ra8e1 samples/hello_world
west debug
Open a serial terminal, step through the application in your debugger, and you should see the following message in the terminal:
***** Booting Zephyr OS v4.3.0-xxx-xxxxxxxxxxxxx *****
Hello World! fpb_ra8e1