Nucleo WB55RG

Overview

The Nucleo WB55RG board is a multi-protocol wireless and ultra-low-power device embedding a powerful and ultra-low-power radio compliant with the Bluetooth® Low Energy (BLE) SIG specification v5.0 and with IEEE 802.15.4-2011.

  • STM32 microcontroller in VFQFPN68 package

  • 2.4 GHz RF transceiver supporting Bluetooth® specification v5.0 and IEEE 802.15.4-2011 PHY and MAC

  • Dedicated Arm® 32-bit Cortex® M0+ CPU for real-time Radio layer

  • Three user LEDs

  • Board connector: USB user with Micro-B

  • Two types of extension resources:

    • Arduino Uno V3 connectivity

    • ST morpho extension pin headers for full access to all STM32 I/Os

  • Integrated PCB antenna or footprint for SMA connector

  • On-board ST-LINK/V2-1 debugger/programmer with SWD connector

  • Flexible power-supply options: ST-LINK USB VBUS or external sources

  • On-board socket for CR2032 battery

  • On-board ST-LINK/V2-1 debugger/programmer with USB re- enumeration capability: mass storage, virtual COM port and debug port

More information about the board can be found at the Nucleo WB55RG website.

Hardware

STM32WB55RG is an ultra-low-power dual core Arm Cortex-M4 MCU 64 MHz,Cortex-M0 32MHz with 1 Mbyte of Flash memory, Bluetooth 5, 802.15.4, USB, LCD, AES-256 SoC and provides the following hardware capabilities:

  • Ultra-low-power with FlexPowerControl (down to 600 nA Standby mode with RTC and 32KB RAM)

  • Core: ARM® 32-bit Cortex®-M4 CPU with FPU, frequency up to 64 MHz

  • Radio:

    • 2.4GHz

    • RF transceiver supporting Bluetooth® 5 specification, IEEE 802.15.4-2011 PHY and MAC, supporting Thread and ZigBee|reg| 3.0

    • RX Sensitivity: -96 dBm (Bluetooth|reg| Low Energy at 1 Mbps), -100 dBm (802.15.4)

    • Programmable output power up to +6 dBm with 1 dB steps

    • Integrated balun to reduce BOM

    • Support for 2 Mbps

    • Dedicated Arm|reg| 32-bit Cortex|reg| M0 + CPU for real-time Radio layer

    • Accurate RSSI to enable power control

    • Suitable for systems requiring compliance with radio frequency regulations ETSI EN 300 328, EN 300 440, FCC CFR47 Part 15 and ARIB STD-T66

    • Support for external PA

  • Clock Sources:

    • 32 MHz crystal oscillator with integrated trimming capacitors (Radio and CPU clock)

    • 32 kHz crystal oscillator for RTC (LSE)

    • 2x Internal low-power 32 kHz RC (±5% and ±500ppm)

    • Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by LSE (better than ±0.25 % accuracy)

    • 2 PLLs for system clock, USB, SAI and ADC

  • RTC with HW calendar, alarms and calibration

  • LCD 8 x 40 or 4 x 44 with step-up converter

  • Up to 24 capacitive sensing channels: support touchkey, linear and rotary touch sensors

  • 16x timers:

    • 2x 16-bit advanced motor-control

    • 2x 32-bit and 5x 16-bit general purpose

    • 2x 16-bit basic

    • 2x low-power 16-bit timers (available in Stop mode)

    • 2x watchdogs

    • SysTick timer

  • Up to 114 fast I/Os, most 5 V-tolerant, up to 14 I/Os with independent supply down to 1.08 V

  • Memories

    • Up to 1 MB Flash, 2 banks read-while-write, proprietary code readout protection

    • Up to 320 KB of SRAM including 64 KB with hardware parity check

    • External memory interface for static memories supporting SRAM, PSRAM, NOR and NAND memories

    • Quad SPI memory interface

  • 4x digital filters for sigma delta modulator

  • Rich analog peripherals (down to 1.62 V)

    • 12-bit ADC 4.26Msps, up to 16-bit with hardware oversampling, 200 uA/Msps

    • 2x ultra-low-power comparator

    • Accurate 2.5 V or 2.048 V reference voltage buffered output

  • System peripherals

    • Inter processor communication controller (IPCC) for communication with Bluetooth|reg| Low Energy and 802.15.4

    • HW semaphores for resources sharing between CPUs

    • 2x DMA controllers (7x channels each) supporting ADC, SPI, I2C, USART, QSPI, SAI, AES, Timers

    • 1x USART (ISO 7816, IrDA, SPI Master, Modbus and Smartcard mode)

    • 1x LPUART (low power)

    • 2x SPI 32 Mbit/s

    • 2x I2C (SMBus/PMBus)

    • 1x SAI (dual channel high quality audio)

    • 1x USB 2.0 FS device, crystal-less, BCD and LPM

    • Touch sensing controller, up to 18 sensors

    • LCD 8x40 with step-up converter

    • 1x 16-bit, four channels advanced timer

    • 2x 16-bits, two channels timer

    • 1x 32-bits, four channels timer

    • 2x 16-bits ultra-low-power timer

    • 1x independent Systick

    • 1x independent watchdog

    • 1x window watchdog

  • Security and ID

  • 3x hardware encryption AES maximum 256-bit for the application, the Bluetooth|reg| Low Energy and IEEE802.15.4

  • Customer key storage / key manager services

  • HW public key authority (PKA)

  • Cryptographic algorithms: RSA, Diffie-Helman, ECC over GF(p)

  • True random number generator (RNG)

  • Sector protection against R/W operation (PCROP)

  • CRC calculation unit

  • 96-bit unique ID

  • 64-bit unique ID. Possibility to derive 802.15.5 64-bit and Bluetooth|reg| Low Energy 48-bit EUI

  • Up to 72 fast I/Os, 70 of them 5 V-tolerant

  • Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell™

More information about STM32WB55RG can be found here:

Supported Features

The nucleo_wb55rg board supports the hardware features listed below.

on-chip / on-board
Feature integrated in the SoC / present on the board.
2 / 2
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.
vnd,foo
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

nucleo_wb55rg/stm32wb55xx target

Type

Location

Description

Compatible

CPU

on-chip

ARM Cortex-M4F CPU1

arm,cortex-m4f

ADC

on-chip

STM32 ADC1

st,stm32-adc

Bluetooth

on-chip

STM32WB Radio device1

st,stm32wb-rf

Clock control

on-chip

STM32WB Reset and Clock controller node1

st,stm32wb-rcc

on-chip

Generic fixed-rate clock provider3 2

fixed-clock

on-chip

STM32 MSI Clock1

st,stm32-msi-clock

on-chip

STM32 LSE Clock1

st,stm32-lse-clock

on-chip

STM32WB and STM32WL PLL node1

st,stm32wb-pll-clock

on-chip

STM32 Clock multiplexer1

st,stm32-clock-mux

Counter

on-chip

STM32 counters3

st,stm32-counter

Cryptographic accelerator

on-chip

STM32 AES Accelerator1

st,stm32-aes

DMA

on-chip

STM32 DMA controller (V2)2

st,stm32-dma-v2

on-chip

STM32 DMAMUX controller1

st,stm32-dmamux

Flash controller

on-chip

STM32 Family flash controller1

st,stm32-flash-controller

GPIO & Headers

on-chip

STM32 GPIO Controller6

st,stm32-gpio

on-board

GPIO pins exposed on Arduino Uno (R3) headers1

arduino-header-r3

I2C

on-chip

STM32 I2C V2 controller2

st,stm32-i2c-v2

Input

on-board

Group of GPIO-bound input keys1

gpio-keys

Interrupt controller

on-chip

ARMv7-M NVIC (Nested Vectored Interrupt Controller)1

arm,v7m-nvic

on-chip

STM32 External Interrupt Controller1

st,stm32-exti

LED

on-board

Group of GPIO-controlled LEDs1

gpio-leds

Memory controller

on-chip

STM32 Battery Backed RAM1

st,stm32-bbram

MTD

on-chip

STM32 flash memory1

st,stm32-nv-flash

on-board

Fixed partitions of a flash (or other non-volatile storage) memory1

fixed-partitions

PHY

on-chip

This binding is to be used by all the usb transceivers which are built-in with USB IP1

usb-nop-xceiv

Pin control

on-chip

STM32 Pin controller1

st,stm32-pinctrl

Power management

on-chip

STM32 power controller1

st,stm32-pwr

PWM

on-chip

STM32 PWM2 2

st,stm32-pwm

QSPI

on-chip

STM32 QSPI Controller1

st,stm32-qspi

Reset controller

on-chip

STM32 Reset and Clock Control (RCC) Controller1

st,stm32-rcc-rctl

RNG

on-chip

STM32 Random Number Generator1

st,stm32-rng

RTC

on-chip

STM32 RTC1

st,stm32-rtc

Sensors

on-chip

STM32 family TEMP node for production calibrated sensors with two calibration temperatures1

st,stm32-temp-cal

on-chip

STM32 VREF+1

st,stm32-vref

on-chip

STM32 VBAT1

st,stm32-vbat

Serial controller

on-chip

STM32 USART1

st,stm32-usart

on-chip

STM32 LPUART1

st,stm32-lpuart

SMbus

on-chip

STM32 SMBus controller2

st,stm32-smbus

SPI

on-chip

STM32 SPI controller with embedded Rx and Tx FIFOs1 1

st,stm32-spi-fifo

SRAM

on-chip

Generic on-chip SRAM description1

mmio-sram

Timer

on-chip

ARMv7-M System Tick1

arm,armv7m-systick

on-chip

STM32 timers2 2

st,stm32-timers

on-chip

STM32 low-power timer (LPTIM)1

st,stm32-lptim

USB

on-chip

STM32 USB controller1

st,stm32-usb

Watchdog

on-chip

STM32 system window watchdog1

st,stm32-window-watchdog

on-chip

STM32 watchdog1

st,stm32-watchdog

Bluetooth and compatibility with STM32WB Copro Wireless Binaries

To operate bluetooth on Nucleo WB55RG, Cortex-M0 core should be flashed with a valid STM32WB Coprocessor binaries (either ‘Full stack’ or ‘HCI Layer’). These binaries are delivered in STM32WB Cube packages, under Projects/STM32WB_Copro_Wireless_Binaries/STM32WB5x/

For compatibility information with the various versions of these binaries, please check hal_stm32:lib/stm32wb/README.rst.

Note that since STM32WB Cube package V1.13.2, “full stack” binaries are not compatible anymore for a use in Zephyr and only “HCI Only” versions should be used on the M0 side.

Connections and IOs

Nucleo WB55RG Board has 6 GPIO controllers. These controllers are responsible for pin muxing, input/output, pull-up, etc.

Default Zephyr Peripheral Mapping:

  • UART_1 TX/RX : PB7/PB6

  • LPUART_1 TX/RX : PA3/PA2 (arduino_serial)

  • I2C_1_SCL : PB8

  • I2C_1_SDA : PB9

  • I2C_3_SCL : PC0

  • I2C_3_SDA : PC1

  • USER_PB : PC4

  • USER_PB1 : PD0

  • USER_PB2 : PD1

  • LD1 : PB5

  • LD2 : PB0

  • LD3 : PB1

  • SPI_1_NSS : PA4 (arduino_spi)

  • SPI_1_SCK : PA5 (arduino_spi)

  • SPI_1_MISO : PA6 (arduino_spi)

  • SPI_1_MOSI : PA7 (arduino_spi)

  • PWM_2 CH 1 : PA0

  • ADC_1_CH3 : PC2

System Clock

Nucleo WB55RG System Clock could be driven by internal or external oscillator, as well as main PLL clock. By default System clock is driven by HSE clock at 32MHz.

Serial Port

Nucleo WB55RG board has 2 (LP)U(S)ARTs. The Zephyr console output is assigned to USART1. Default settings are 115200 8N1.

Programming and Debugging

Nucleo WB55RG board includes an ST-LINK/V2-1 embedded debug tool interface.

Applications for the nucleo_wb55rg board configuration can be built the usual way (see Building an Application).

Flashing

The board is configured to be flashed using west STM32CubeProgrammer runner, so its installation is required.

Alternatively, OpenOCD or pyOCD can also be used to flash the board using the --runner (or -r) option:

$ west flash --runner openocd
$ west flash --runner pyocd

If you prefer, you can use pyOCD, but it requires to enable “pack” support with the following pyOCD command:

$ pyocd pack --update
$ pyocd pack --install stm32wb55rg

Flashing an application to Nucleo WB55RG

Connect the Nucleo WB55RG to your host computer using the USB port. Then build and flash an application. Here is an example for the Hello World application.

Run a serial host program to connect with your Nucleo board:

$ minicom -D /dev/ttyUSB0

Then build and flash the application.

# From the root of the zephyr repository
west build -b nucleo_wb55rg samples/hello_world
west flash

You should see the following message on the console:

Hello World! arm

Debugging

You can debug an application in the usual way. Here is an example for the Blinky application.

# From the root of the zephyr repository
west build -b nucleo_wb55rg samples/basic/blinky
west debug