Nucleo H7S3L8
Overview
The STM32 Nucleo-144 board provides an affordable and flexible way for users to try out new concepts and build prototypes by choosing from the various combinations of performance and power consumption features, provided by the STM32 microcontroller.
The ST Zio connector, which extends the ARDUINO® Uno V3 connectivity, and the ST morpho headers provide an easy means of expanding the functionality of the Nucleo open development platform with a wide choice of specialized shields. The STM32 Nucleo-144 board does not require any separate probe as it integrates the ST-LINK V3 debugger/programmer.
The STM32 Nucleo-144 board comes with the STM32 comprehensive free software libraries and examples available with the STM32Cube MCU Package.
Key Features
STM32 microcontroller with 64Kbytes of flash and 620Kbytes of RAM in TFBGA225 package
Ethernet compliant with IEEE-802.3-2002
USB USB Device only, USB OTG full speed, or SNK/UFP (full-speed or high-speed mode)
3 user LEDs
2 user and reset push-buttons
32.768 kHz crystal oscillator
Board connectors:
USB with Micro-AB or USB Type-C®
Ethernet RJ45
MIPI20 compatible connector with trace signals
Flexible power-supply options: ST-LINK USB VBUS or external sources
External or internal SMPS to generate Vcore logic supply
On-board ST-LINK/V3 debugger/programmer with USB re-enumeration
capability: mass storage, virtual COM port and debug port
More information about the board can be found at the Nucleo H7S3L8 website.
Hardware
Nucleo H7S3L8 provides the following hardware components:
The STM32H7S7xx devices are a high-performance microcontrollers family (STM32H7 Series) based on the high-performance Arm® Cortex®-M7 32-bit RISC core. They operate at a frequency of up to 500 MHz.
Core: ARM® 32-bit Cortex® -M7 CPU with TrustZone® and FPU.
Performance benchmark:
1284 DMPIS/MHz (Dhrystone 2.1)
Security
Arm® TrustZone® with ARMv8-M mainline security extension
Up to 8 configurable SAU regions
TrustZone® aware and securable peripherals
Flexible lifecycle scheme with secure debug authentication
Preconfigured immutable root of trust (ST-iROT)
SFI (secure firmware installation)
Secure data storage with hardware unique key (HUK)
Secure firmware upgrade support with TF-M
2x AES coprocessors including one with DPA resistance
Public key accelerator, DPA resistant
On-the-fly decryption of Octo-SPI external memories
HASH hardware accelerator
True random number generator, NIST SP800-90B compliant
96-bit unique ID
Active tampers
True Random Number Generator (RNG) NIST SP800-90B compliant
Clock management:
24 MHz crystal oscillator (HSE)
32768 Hz crystal oscillator for RTC (LSE)
Internal 64 MHz (HSI) trimmable by software
Internal low-power 32 kHz RC (LSI)( ±5%)
Internal 4 MHz oscillator (CSI), trimmable by software
Internal 48 MHz (HSI48) with recovery system
3 PLLs for system clock, USB, audio, ADC
Power management
Embedded regulator (LDO) with three configurable range output to supply the digital circuitry
RTC with HW calendar, alarms and calibration
Up to 152 fast I/Os, most 5 V-tolerant, up to 10 I/Os with independent supply down to 1.08 V
Up to 16 timers and 2 watchdogs
16x 16-bit
4x 32-bit timers with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
5x 16-bit low-power 16-bit timers (available in Stop mode)
2x watchdogs
1x SysTick timer
Memories
Up to 64KB Flash, 2 banks read-while-write
1 Kbyte OTP (one-time programmable)
640 KB of SRAM including 64 KB with hardware parity check and 320 Kbytes with flexible ECC
4 Kbytes of backup SRAM available in the lowest power modes
Flexible external memory controller with up to 16-bit data bus: SRAM, PSRAM, FRAM, SDRAM/LPSDR SDRAM, NOR/NAND memories
2x OCTOSPI memory interface with on-the-fly decryption and support for serial PSRAM/NAND/NOR, Hyper RAM/Flash frame formats
1x HEXASPI memory interface with on-the-fly decryption and support for serial PSRAM/NAND/NOR, Hyper RAM/Flash frame formats
2x SD/SDIO/MMC interfaces
Rich analog peripherals (independent supply)
2x 12-bit ADC with up to 5 MSPS in 12-bit
1x Digital temperature sensor
35x communication interfaces
1x USB Type-C / USB power-delivery controller
1x USB OTG full-speed with PHY
1x USB OTG high-speed with PHY
3x I2C FM+ interfaces (SMBus/PMBus)
1x I3C interface
7x U(S)ARTS (ISO7816 interface, LIN, IrDA, modem control)
2x LP UART
6x SPIs including 3 muxed with full-duplex I2S
2x SAI
2x FDCAN
2x SD/SDIO/MMC interface
2x 16 channel DMA controllers
1x 8- to 16- bit camera interface
1x HDMI-CEC
1x Ethernel MAC interface with DMA controller
1x 16-bit parallel slave synchronous-interface
1x SPDIF-IN interface
1x MDIO slave interface
CORDIC for trigonometric functions acceleration
FMAC (filter mathematical accelerator)
CRC calculation unit
Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell™
More information about STM32H7S3 can be found here:
Supported Features
The nucleo_h7s3l8
board supports the hardware features listed below.
- on-chip / on-board
- Feature integrated in the SoC / present on the board.
- 2 / 2
-
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files. -
vnd,foo
-
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.
nucleo_h7s3l8/stm32h7s3xx
target
Type |
Location |
Description |
Compatible |
---|---|---|---|
CPU |
on-chip |
ARM Cortex-M7 CPU1 |
|
ADC |
on-chip |
||
Clock control |
on-chip |
STM32H7RS RCC (Reset and Clock controller)1 |
|
on-chip |
STM32 HSE Clock1 |
||
on-chip |
STM32 HSI Clock1 |
||
on-chip |
Generic fixed-rate clock provider3 |
||
on-chip |
STM32 LSE Clock1 |
||
on-chip |
|||
on-chip |
STM32 Clock multiplexer1 |
||
on-chip |
STM32 Microcontroller Clock Output (MCO)2 |
||
Counter |
on-chip |
STM32 counters10 |
|
Flash controller |
on-chip |
STM32 Family flash controller1 |
|
GPIO & Headers |
on-chip |
STM32 GPIO Controller12 |
|
on-board |
GPIO pins exposed on Arduino Uno (R3) headers1 |
||
I2C |
on-chip |
||
I2S |
on-chip |
STM32H7 I2S controller1 |
|
Input |
on-board |
Group of GPIO-bound input keys1 |
|
Interrupt controller |
on-chip |
ARMv7-M NVIC (Nested Vectored Interrupt Controller)1 |
|
on-chip |
STM32H7RS External Interrupt Controller1 |
||
LED |
on-board |
Group of GPIO-controlled LEDs1 |
|
MMU / MPU |
on-chip |
ARMv7-M Memory Protection Unit (MPU)1 |
|
MTD |
on-chip |
STM32 flash memory1 |
|
PHY |
on-chip |
This binding is to be used by all the usb transceivers which are built-in with USB IP1 |
|
Pin control |
on-chip |
STM32 Pin controller1 |
|
PWM |
on-chip |
STM32 PWM8 |
|
Reset controller |
on-chip |
STM32 Reset and Clock Control (RCC) Controller1 |
|
RNG |
on-chip |
STM32 Random Number Generator1 |
|
Sensors |
on-chip |
STM32 family TEMP node for production calibrated sensors with two calibration temperatures1 |
|
on-chip |
STM32 VBAT1 |
||
on-chip |
STM32 VREF+1 |
||
Serial controller |
on-chip |
||
on-chip |
STM32 UART4 |
||
on-chip |
STM32 LPUART1 |
||
SPI |
on-chip |
||
SRAM |
on-chip |
Generic on-chip SRAM description1 |
|
Timer |
on-chip |
ARMv7-M System Tick1 |
|
on-chip |
STM32 timers11 |
||
on-chip |
STM32 low-power timer (LPTIM)1 |
||
USB |
on-chip |
STM32 OTGFS controller1 |
|
Watchdog |
on-chip |
STM32 watchdog1 |
|
on-chip |
STM32 system window watchdog1 |
For more details please refer to STM32H7R/S Nucleo-144 board User Manual.
Default Zephyr Peripheral Mapping:
The Nucleo H7S3L8 board features a ST Zio connector (extended Arduino Uno V3) and a ST morpho connector. Board is configured as follows:
UART_3 TX/RX : PD8/PD9 (ST-Link Virtual Port Com)
USER_PB : PC13
LD1 : PD10
LD2 : PD13
LD3 : PB7
I2C : PB8, PB9
SPI1 NSS/SCK/MISO/MOSI : PD14PA5/PA6/PB5 (Arduino SPI)
System Clock
Nucleo H7S3L8 System Clock could be driven by an internal or external oscillator, as well as the main PLL clock. By default, the System clock is driven by the PLL clock at 600MHz, driven by an 24MHz high-speed external clock.
Serial Port
Nucleo H7S3L8 board has 4 UARTs and 3 USARTs plus one LowPower UART. The Zephyr console output is assigned to UART3. Default settings are 115200 8N1.
Backup SRAM
In order to test backup SRAM you may want to disconnect VBAT from VDD. You can
do it by removing SB13
jumper on the back side of the board.
Programming and Debugging
Nucleo H7S3L8 board includes an ST-LINK/V3 embedded debug tool interface.
Note
Check if your ST-LINK V3 has newest FW version. It can be done with STM32CubeProgrammer
Flashing
The board is configured to be flashed using west STM32CubeProgrammer runner, so its installation is required.
Alternatively, OpenOCD or JLink can also be used to flash the board using
the --runner
(or -r
) option:
$ west flash --runner openocd
Flashing an application to Nucleo H7S3L8
First, connect the NUCLEO-H7S3L8 to your host computer using the USB port to prepare it for flashing. Then build and flash your application.
Here is an example for the Hello World application.
Run a serial host program to connect with your NUCLEO-H7S3L8 board.
$ minicom -b 115200 -D /dev/ttyACM0
or use screen:
$ screen /dev/ttyACM0 115200
Build and flash the application:
# From the root of the zephyr repository
west build -b nucleo_h7s3l8 samples/hello_world
west flash
You should see the following message on the console:
$ Hello World! nucleo_h7s3l8
Blinky example can also be used:
# From the root of the zephyr repository
west build -b nucleo_h7s3l8 samples/basic/blinky
west flash
Debugging
You can debug an application in the usual way. Here is an example for the Hello World application.
# From the root of the zephyr repository
west build -b nucleo_h7s3l8 samples/hello_world
west debug